公开(公告)号：US20240341043A1

公开(公告)日：2024-10-10

申请号：US18130719

申请日：2023-04-04

申请人： Toyota Motor Engineering & Manufacturing North America, Inc.

发明人： Feng Zhou ,  Tianzhu Fan ,  Ercan Mehmet Dede

IPC分类号： H05K3/46 ,  H05K3/00 ,  H05K3/30 ,  H05K3/42 ,  H05K7/20

CPC分类号： H05K3/4611 ,  H05K3/0047 ,  H05K3/30 ,  H05K3/423 ,  H05K7/20254 ,  H05K7/20272 ,  H05K7/20927 ,  B33Y10/00 ,  H05K2203/107

摘要： A method for high volume manufacture of highly integrated power electronics embedded printed circuit board (PCB)-cold plate assemblies includes bonding a power device fabrication panel to a multi-layer PCB, drilling via passageways in the multi-layer PCB, and electroplating a conductive metal into the vias before bonding the power device fabrication panel to a plurality of cold plates and forming an IPEs embedded PCB-cold plate fabrication panel. The method also includes cutting the IPEs embedded PCB-cold plate fabrication panel into a plurality of highly IPEs embedded PCB-cold plate assemblies.

公开(公告)号：US20240341034A1

公开(公告)日：2024-10-10

申请号：US18623091

申请日：2024-04-01

申请人： IBIDEN CO., LTD.

发明人： Masashi KUWABARA ,  Susumu KAGOHASHI

IPC分类号： H05K1/11 ,  H05K1/02 ,  H05K1/03 ,  H05K1/09 ,  H05K3/00 ,  H05K3/10 ,  H05K3/42

CPC分类号： H05K1/116 ,  H05K1/0242 ,  H05K1/09 ,  H05K3/002 ,  H05K3/0035 ,  H05K3/0041 ,  H05K3/108 ,  H05K3/423 ,  H05K1/0306 ,  H05K1/0373 ,  H05K2201/0209 ,  H05K2201/0338 ,  H05K2201/096 ,  H05K2203/0723

摘要： A wiring substrate includes a core substrate having a through-hole conductor, a resin insulating layer formed on the core substrate, a conductor layer formed on the insulating layer and including a seed layer and an electrolytic plating layer, and a via conductor formed in the insulating layer. The via conductor electrically connects the through-hole conductor and conductor layer. The via conductor includes the seed layer and electrolytic plating layer extending from the conductor layer. The core substrate includes a glass substrate and has a through hole penetrating through the glass substrate. The through-hole conductor is formed in the through hole. The seed layer is covering inner wall surface of the insulating layer in opening in which the via conductor is formed. The seed layer has a first portion and a second portion electrically connected to the first portion. That part of the first portion is formed on the second portion.

公开(公告)号：US12114424B2

公开(公告)日：2024-10-08

申请号：US17639323

申请日：2020-04-24

申请人： HongQiSheng Precision Electronics (QinHuangDao) Co., Ltd. ,  Avary Holding (Shenzhen) Co., Limited.

发明人： Mei Yang ,  Gang Yuan

IPC分类号： H05K1/11 ,  H03K3/42 ,  H05K3/06 ,  H05K3/42

CPC分类号： H05K1/115 ,  H05K3/067 ,  H05K3/423 ,  H05K2201/09227 ,  H05K2201/09563

摘要： A circuit board and a manufacturing method therefor. The circuit board includes a substrate and a plurality of traces arranged at intervals on the substrate. Each trace includes a seed layer located on one surface of the substrate, a first copper layer located on the surface of the seed layer away from the substrate, and a second copper layer plated on one surface of the substrate. The second copper layer covers the seed layer and the first copper layer. The ratio of the thickness of each trace to the space between any two adjacent traces is greater than 1. The thickness of the second copper layer in the thickness direction of the substrate is greater than the thickness of the second copper layer in a direction perpendicular to the thickness direction of the substrate.

公开(公告)号：US20240306297A1

公开(公告)日：2024-09-12

申请号：US18601668

申请日：2024-03-11

申请人： Apple Inc.

发明人： Anne M. Mason ,  Chad O. Simpson ,  William Hannon ,  Mark J. Beesley

IPC分类号： H05K1/11 ,  H05K3/00 ,  H05K3/42

CPC分类号： H05K1/115 ,  H05K3/0047 ,  H05K3/422 ,  H05K3/423 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2203/107

摘要： Structures that implement three-dimensional (3D) conductive material (e.g., copper) in printed circuit boards (PCBs) are disclosed. 3D (three-dimensional) conductive material may include trenches and/or buried vias that are filled with conductive material in the PCBs. Trenches may be formed in build-up layers of a PCB by overlapping multiple laser drilled vias. The trenches may be filled with conductive material using electroplating process(es). Buried vias may be formed through the core layers of the PCB by mechanical drilling. The buried via may be filled with solid conductive material using a combination of electroless plating and electrolytic plating of conductive material. Various PCB structures are disclosed that implement combinations of these trenches and/or these buried vias filled with conductive material.

公开(公告)号：US20240268038A1

公开(公告)日：2024-08-08

申请号：US18434888

申请日：2024-02-07

申请人： IBIDEN CO., LTD.

发明人： Susumu KAGOHASHI ,  Jun SAKAI ,  Kyohei YOSHIKAWA

IPC分类号： H05K3/46 ,  H05K1/03 ,  H05K1/09 ,  H05K3/40 ,  H05K3/42

CPC分类号： H05K3/4688 ,  H05K1/0306 ,  H05K1/0353 ,  H05K1/09 ,  H05K3/4038 ,  H05K3/423 ,  H05K2201/0209 ,  H05K2201/0212 ,  H05K2201/0323 ,  H05K2201/0326

摘要： A printed wiring board includes a first conductor layer, a resin insulating layer including glass particles and resin, a second conductor layer formed on a surface of the resin insulating layer and including a seed layer and an electrolytic plating layer, and a via conductor connecting the first conductor layer and second conductor layer and including the seed layer and electrolytic plating layer extending from the second conductor layer. The second conductor layer and the via conductor are formed such that the second conductor layer includes signal wirings and that the seed layer is formed by sputtering an alloy including copper, aluminum, and one or more metals selected from nickel, zinc, gallium, silicon, and magnesium, and the resin insulating layer is formed such that the surface of the resin insulating layer includes the resin and that an inner wall surface in the opening includes the resin and the glass particles.

公开(公告)号：US11956898B2

公开(公告)日：2024-04-09

申请号：US17119126

申请日：2020-12-11

申请人： Apple Inc.

发明人： Anne M. Mason ,  Chad O. Simpson ,  William Hannon ,  Mark J. Beesley

IPC分类号： H05K1/11 ,  H05K3/00 ,  H05K3/42

CPC分类号： H05K1/115 ,  H05K3/0047 ,  H05K3/422 ,  H05K3/423 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2203/107

摘要： Structures that implement three-dimensional (3D) conductive material (e.g., copper) in printed circuit boards (PCBs) are disclosed. 3D (three-dimensional) conductive material may include trenches and/or buried vias that are filled with conductive material in the PCBs. Trenches may be formed in build-up layers of a PCB by overlapping multiple laser drilled vias. The trenches may be filled with conductive material using electroplating process(es). Buried vias may be formed through the core layers of the PCB by mechanical drilling. The buried via may be filled with solid conductive material using a combination of electroless plating and electrolytic plating of conductive material. Various PCB structures are disclosed that implement combinations of these trenches and/or these buried vias filled with conductive material.

公开(公告)号：US11917768B2

公开(公告)日：2024-02-27

申请号：US17584003

申请日：2022-01-25

申请人： RICHVIEW ELECTRONICS CO., LTD.

发明人： Siping Bai ,  Xianglan Wu ,  Zhijian Wang ,  Zhigang Yang ,  Jinqiang Zhang

IPC分类号： H05K3/06 ,  H05K3/42 ,  H05K3/10 ,  C23C14/48 ,  H05K1/11 ,  H05K3/04 ,  H05K3/46

CPC分类号： H05K3/429 ,  C23C14/48 ,  H05K1/115 ,  H05K3/105 ,  H05K3/42 ,  H05K3/422 ,  H05K3/423 ,  H05K3/427 ,  H05K3/048 ,  H05K3/06 ,  H05K3/108 ,  H05K3/421 ,  H05K3/426 ,  H05K3/4617 ,  H05K2201/0355 ,  H05K2201/096 ,  H05K2203/0565 ,  H05K2203/0769 ,  H05K2203/092 ,  H05K2203/1423

摘要： A multi-layer circuit board, successively constituted by surface sticking layer, single-layer circuit board, middle sticking layer, single-layer circuit board, surface sticking layer, said multi-layer circuit board is provided with a hole, a hole wall of said hole is formed with conductive seed layer, and partial outer surface of said surface sticking layer is formed with a circuit pattern layer of conductive seed layer, wherein said conductive seed layer comprises a ion implantation layer implanting below the hole wall of said hole and below partial outer surface of said surface sticking layer.

公开(公告)号：US11895772B2

公开(公告)日：2024-02-06

申请号：US17377280

申请日：2021-07-15

申请人： Unimicron Technology Corp.

发明人： Chi-Min Chang ,  Ching-Sheng Chen ,  Jun-Rui Huang ,  Wei-Yu Liao ,  Yi-Pin Lin

IPC分类号： H05K1/11 ,  H05K3/42 ,  H05K1/18

CPC分类号： H05K1/115 ,  H05K1/181 ,  H05K3/423 ,  H05K2201/09545

摘要： An interlayer connective structure is suitable for being formed in a wiring board, in which the wiring board includes two traces and an insulation part between the traces. The insulation part has a through hole. The interlayer connective structure located in the through hole is connected to the traces. The interlayer connective structure includes a column and a pair of protuberant parts. The protuberant parts are located at two ends of the through hole respectively and connected to the column and the traces. The protuberant parts stick out from the outer surfaces of the traces respectively. Each of the protuberant parts has a convex curved surface, in which the distance between the convex curved surface and the axis of the through hole is less than the radius of the through hole.

公开(公告)号：US20240032204A1

公开(公告)日：2024-01-25

申请号：US17952015

申请日：2022-09-23

申请人： Tong Hsing Electronic Industries, Ltd.

发明人： Yueh-Kai TANG ,  Chia-Shuai CHANG ,  Ming-Yen PAN ,  Jian-Yu SHIH ,  Jhih-Wei LAI ,  Shih-Han WU

IPC分类号： H05K3/06 ,  H05K3/42 ,  H05K1/03

CPC分类号： H05K3/06 ,  H05K3/423 ,  H05K1/0353 ,  H05K2203/0723 ,  H05K2203/107 ,  H05K2203/1377 ,  H05K2201/09545

摘要： A method for manufacturing a conductive circuit board includes the steps of: (a) preparing a substrate having opposite upper and lower surfaces, and at least one through hole extending through the upper and lower surfaces and defined by an inner surface; (b) forming a metal base layer on at least one of the upper and lower surfaces and on the inner surface; (c) etching the metal base layer by a laser beam so that the at least one of the upper and lower surfaces and the inner surface are formed with a patterned metal base layer; and (d) forming a metal circuit layer on the at least one of the upper and lower surfaces and on the inner surface to increase a thickness of the patterned metal base layer. A conductive circuit board manufactured therefrom is also enclosed.

公开(公告)号：US20230354503A1

公开(公告)日：2023-11-02

申请号：US18344652

申请日：2023-06-29

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Jiun-Yi WU ,  Chien-Hsun LEE ,  Chewn-Pu JOU ,  Fu-Lung HSUEH

IPC分类号： H05K1/02 ,  H01L21/768 ,  H01L21/48 ,  H01L23/498 ,  H01L23/552 ,  H05K1/11 ,  H05K3/00 ,  H05K3/40 ,  H05K3/42

CPC分类号： H05K1/0216 ,  H05K1/024 ,  H01L21/76805 ,  H05K1/0222 ,  H01L21/485 ,  H01L21/486 ,  H01L23/49827 ,  H01L23/552 ,  H05K1/113 ,  H05K1/115 ,  H05K3/0047 ,  H05K3/4007 ,  H05K3/423 ,  H05K1/0245 ,  H05K3/42 ,  H05K2201/0959 ,  Y10T29/49165 ,  H05K3/4038 ,  H05K2201/0723 ,  H05K2201/09545 ,  H05K2201/09645

摘要： An interconnect structure includes a dielectric block, a first conductive plug, a second conductive plug, a substrate, a first conductive line, and a second conductive line. The first conductive plug and the second conductive plug are surrounded by the dielectric block. The substrate surrounds the dielectric block. The first conductive line is connected to the first conductive plug and is in contact with a top surface of the dielectric block. The second conductive line is connected to the second conductive plug.