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公开(公告)号:US20240332009A1
公开(公告)日:2024-10-03
申请号:US18616689
申请日:2024-03-26
发明人: Qixin Shen , Chuanxi Yang , Hang Yu , Deenesh Padhi , Prashanthi Para , Miguel S. Fung , Rajesh Prasad , Fenglin Wang , Shan Tang , Kyu-Ha Shim
CPC分类号: H01L21/02321 , H01L21/0217 , H01L21/02274 , H01L21/67213
摘要: Exemplary methods of semiconductor processing may include forming a layer of silicon nitride on a semiconductor substrate. The layer of silicon nitride may be characterized by a first roughness. The methods may include performing a post-deposition treatment on the layer of silicon nitride. The methods may include reducing a roughness of the layer of silicon nitride such that the layer of silicon nitride may be characterized by a second roughness less than the first roughness.
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公开(公告)号:US20220415651A1
公开(公告)日:2022-12-29
申请号:US17361925
申请日:2021-06-29
发明人: Qixin Shen , Chuanxi Yang , Hang Yu , Deenesh Padhi , Gill Yong Lee , Sung-Kwan Kang , Abdul Wahab Mohammed , Hailing Liu
IPC分类号: H01L21/02 , H01L21/033 , H01L27/108
摘要: Memory devices and methods of forming memory devices are described. The memory devices comprise a silicon nitride hard mask layer on a ruthenium layer. Forming the silicon nitride hard mask layer on the ruthenium comprises pre-treating the ruthenium layer with a plasma to form an interface layer on the ruthenium layer; and forming a silicon nitride layer on the interface layer by plasma-enhanced chemical vapor deposition (PECVD). Pre-treating the ruthenium layer, in some embodiments, results in the interface layer having a reduced roughness and the memory device having a reduced resistivity compared to a memory device that does not include the interface layer.
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