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公开(公告)号:US11055244B1
公开(公告)日:2021-07-06
申请号:US16419585
申请日:2019-05-22
申请人: Aquantia Corporation
发明人: Paul Langner , Simon Edelhaus
摘要: An input/output (I/O) interface system for computing devices is disclosed. The I/O interface system includes an externally-engageable USB-C interface connector. A first I/O protocol controller circuit couples to the USB-C interface connector via multiple bidirectional serial lanes. Each of the bidirectional serial lanes transfers a single serial stream of data in a simultaneously bidirectional manner. A second I/O protocol controller circuit couples to the USB-C interface connector via multiple unidirectional serial lanes. Each of the unidirectional serial lanes transfers a single serial stream of data in a unidirectional manner. Mode control circuitry selects between the first I/O protocol controller circuit and the second I/O protocol controller circuit for data transfers with the USB-C interface connector based on a detected signaling media externally connected to the USB-C interface connector.
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公开(公告)号:US11044296B1
公开(公告)日:2021-06-22
申请号:US16057609
申请日:2018-08-07
申请人: Aquantia Corporation
发明人: Simon Edelhaus , Alexey Andriyanov
摘要: An Ethernet adapter module for interfacing a network endpoint device to an Ethernet network is disclosed. The Ethernet adapter module includes an Ethernet medium access controller (MAC) and an Ethernet physical layer device (PHY). The Ethernet MAC includes a processor and Time Sensitive Networking and/or Audio Video Bridging (TSN/AVB) state machines that cooperate with the processor to (1) identify a TSN/AVB request from the network endpoint device, and (2) discover a network topology along which to transfer data between the network endpoint device and a second network endpoint device in accordance with a predetermined Quality of Service (QoS). The Ethernet PHY is coupled to the Ethernet MAC and includes timestamp logic to apply a timing reference to the data being transferred.
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公开(公告)号:US10020959B1
公开(公告)日:2018-07-10
申请号:US14858918
申请日:2015-09-18
申请人: Aquantia Corporation
发明人: Simon Edelhaus , Alexey Andriyanov
CPC分类号: H04L12/462 , H04L12/4625 , H04L65/608 , H04L65/80
摘要: An Ethernet adapter module for interfacing a network endpoint device to an Ethernet network is disclosed. The Ethernet adapter module includes an Ethernet medium access controller (MAC) and an Ethernet physical layer device (PHY). The Ethernet MAC includes a processor and audio video bridging (AVB) state machines that cooperate with the processor to (1) identify an AVB request from the network endpoint device, and (2) discover a network topology along which to transfer data between the network endpoint device and a second network endpoint device in accordance with a predetermined Quality of Service (QoS). The Ethernet PHY is coupled to the Ethernet MAC and includes timestamp logic to apply a timing reference to the data being transferred.
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公开(公告)号:US11252094B1
公开(公告)日:2022-02-15
申请号:US16514844
申请日:2019-07-17
申请人: Aquantia Corporation
发明人: Alexey Andriyanov , Simon Edelhaus
IPC分类号: H04L12/859
摘要: A computer-implemented method for controlling data traffic in a network system is disclosed. The method includes establishing a list of prioritized applications on a user device. The applications are monitored for network activity. One or more management packets are assembled in response to detecting network activity corresponding to one of the prioritized applications. The one or more management packets include network attribute information. The management packet is then transferred to a network switch for use in configuring the prioritization of data traffic on the network system.
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公开(公告)号:US10078615B1
公开(公告)日:2018-09-18
申请号:US14858902
申请日:2015-09-18
申请人: Aquantia Corporation
发明人: Simon Edelhaus , Alexey Andriyanov
CPC分类号: G06F13/4282 , G06F13/28 , G06F13/404 , H04L65/4076 , H04L65/607 , H04L65/80 , Y02D10/14 , Y02D10/151
摘要: A method of operation in a system is disclosed. The system includes a system processor, main memory coupled to the system processor, and a serial input/output (IO) interface coupled to the processor. The method includes de-framing multi-media packet data with a local area network peripheral device such as Ethernet, the multi-media packet data having a timing reference. The packet data is mapped to the main memory with the Ethernet peripheral device. The multi-media packet data is then transferred to the main memory as multi-media data, and stored in storage locations of the main memory in accordance with the mapping. The mapping information is accessed from device Host operating system with a second peripheral device via the serial I/O interface. The second peripheral device directly accesses the main memory storage locations. Significant power savings is realized for the CPU.
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公开(公告)号:US10044524B1
公开(公告)日:2018-08-07
申请号:US15276250
申请日:2016-09-26
申请人: Aquantia Corporation
发明人: Simon Edelhaus , Alexey Andriyanov
IPC分类号: H04L12/46 , H04L29/06 , H04L12/751 , G06F13/42 , G06F1/32
摘要: An Ethernet adapter module for interfacing a network endpoint device to an Ethernet network is disclosed. The Ethernet adapter module includes an Ethernet medium access controller (MAC) and an Ethernet physical layer device (PHY). The Ethernet MAC includes a processor and Time Sensitive Networking and/or Audio Video Bridging (TSN/AVB) state machines that cooperate with the processor to (1) identify a TSN/AVB request from the network endpoint device, and (2) discover a network topology along which to transfer data between the network endpoint device and a second network endpoint device in accordance with a predetermined Quality of Service (QoS). The Ethernet PHY is coupled to the Ethernet MAC and includes timestamp logic to apply a timing reference to the data being transferred.
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