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1.发明授权Epitaxial growth of silicon doped with carbon and phosphorus using hydrogen carrier gas 有权使用氢气载气使碳和磷掺杂的硅的外延生长公开(公告)号：US08685845B2
公开(公告)日：2014-04-01
申请号：US12860236
申请日：2010-08-20
IPC分类号： H01L21/20
CPC分类号： H01L21/0262 , H01L21/0237 , H01L21/02529 , H01L21/02576 , H01L21/02587 , H01L21/02636 , H01L29/045 , H01L29/6656 , H01L29/78 , H01L29/7848
摘要： A method for depositing epitaxial films of silicon carbon (Si:C). In one embodiment, the method includes depositing an n-type doped silicon carbon (Si:C) semiconductor material on a semiconductor deposition surface using a deposition gas precursor composed of a silane containing gas precursor, a carbon containing gas precursor, and an n-type gas dopant source. The deposition gas precursor is introduced to the semiconductor deposition surface with a hydrogen (H2) carrier gas. The method for depositing epitaxial films may include an etch reaction provided by hydrogen chloride (HCl) gas etchant and a hydrogen (H2) carrier gas.
摘要翻译： 一种用于沉积硅碳外延膜（Si：C）的方法。 在一个实施例中，该方法包括：使用由含硅烷的气体前体，含碳气体前体和正极材料构成的沉积气体前体，在半导体沉积表面上沉积n型掺杂硅碳（Si：C） 型气体掺杂剂源。 沉积气体前体用氢（H 2）载气引入半导体沉积表面。 沉积外延膜的方法可以包括由氯化氢（HCl）气体蚀刻剂和氢（H 2）载气提供的蚀刻反应。
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2.发明申请EPITAXIAL GROWTH OF SILICON DOPED WITH CARBON AND PHOSPHORUS USING HYDROGEN CARRIER GAS 有权用碳氢化合物与碳氢化合物掺杂的硅的外延生长公开(公告)号：US20120043556A1
公开(公告)日：2012-02-23
申请号：US12860236
申请日：2010-08-20
IPC分类号： H01L29/12 , H01L21/203
CPC分类号： H01L21/0262 , H01L21/0237 , H01L21/02529 , H01L21/02576 , H01L21/02587 , H01L21/02636 , H01L29/045 , H01L29/6656 , H01L29/78 , H01L29/7848
摘要： A method for depositing epitaxial films of silicon carbon (Si:C). In one embodiment, the method includes depositing an n-type doped silicon carbon (Si:C) semiconductor material on a semiconductor deposition surface using a deposition gas precursor composed of a silane containing gas precursor, a carbon containing gas precursor, and an n-type gas dopant source. The deposition gas precursor is introduced to the semiconductor deposition surface with a hydrogen (H2) carrier gas. The method for depositing epitaxial films may include an etch reaction provided by hydrogen chloride (HCl) gas etchant and a hydrogen (H2) carrier gas.
摘要翻译： 一种用于沉积硅碳外延膜（Si：C）的方法。 在一个实施例中，该方法包括：使用由含硅烷的气体前体，含碳气体前体和正极材料构成的沉积气体前体，在半导体沉积表面上沉积n型掺杂硅碳（Si：C） 型气体掺杂剂源。 沉积气体前体用氢（H 2）载气引入半导体沉积表面。 沉积外延膜的方法可以包括由氯化氢（HCl）气体蚀刻剂和氢（H 2）载气提供的蚀刻反应。
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3.发明申请公开(公告)号：US20090267118A1
公开(公告)日：2009-10-29
申请号：US12111377
申请日：2008-04-29
CPC分类号： H01L21/02529 , H01L21/02381 , H01L21/02532 , H01L21/0262 , H01L21/02636 , H01L29/165 , H01L29/66636 , H01L29/78 , H01L29/7848
摘要： Methods for forming carbon silicon alloy (CSA) and structures thereof are disclosed. The method provides improvement in substitutionality and deposition rate of carbon in epitaxially grown carbon silicon alloy layers (i.e., substituted carbon in Si lattice). In one embodiment of the disclosed method, a carbon silicon alloy layer is epitaxially grown on a substrate at an intermediate temperature with a silicon precursor, a carbon (C) precursor in the presence of an etchant and a trace amount of germanium material (e.g., germane (GeH4)). The intermediate temperature increases the percentage of substitutional carbon in epitaxially grown CSA layer and avoids any tendency for silicon carbide to form. The presence of the trace amount of germanium material, of approximately less than 1% to approximately 5%, in the resulting epitaxial layer, has an effect of stabilizing and enhancing deposition/growth rate without compromising the tensile stress of CSA layer formed thereby.
摘要翻译： 公开了形成碳硅合金（CSA）的方法及其结构。 该方法提供了外延生长碳硅合金层（即Si晶格中的取代碳）的碳的取代度和沉积速率的改善。 在所公开的方法的一个实施方案中，在中间温度下在硅衬底，碳（C）前体，在蚀刻剂和痕量锗材料存在下，在衬底上外延生长碳硅合金层（例如， （GeH4））。 中间温度增加外延生长的CSA层中的替代碳的百分比，并避免形成碳化硅的任何倾向。 在所得外延层中痕量锗材料的存在大约小于1％至约5％具有稳定和增强沉积/生长速率的效果，而不会影响由此形成的CSA层的拉伸应力。
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公开(公告)号：US20130009211A1
公开(公告)日：2013-01-10
申请号：US13616994
申请日：2012-09-14
IPC分类号： H01L29/161 , H01L27/092
CPC分类号： H01L21/823814 , H01L21/76224 , H01L21/823807
摘要： Epitaxial deposition of silicon germanium in a semiconductor device is achieved without using masks. Nucleation delays induced by interactions with dopants present before deposition of the silicon germanium are used to determine a period over which an exposed substrate surface may be subjected to epitaxial deposition to form a layer of SiGe on desired parts with substantially no deposition on other parts. Dopant concentration may be changed to achieve desired thicknesses within preferred deposition times. Resulting deposited SiGe is substantially devoid of growth edge effects.
摘要翻译： 在不使用掩模的情况下实现硅锗在半导体器件中的外延沉积。 使用在沉积硅锗之前与存在的掺杂剂的相互作用引起的成核延迟来确定暴露的衬底表面可以经历外延沉积以在所需部分上形成SiGe层的周期，而在其它部分上基本上没有沉积。 可以改变掺杂剂浓度以在优选的沉积时间内实现期望的厚度。 导致沉积的SiGe基本上没有生长边缘效应。
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公开(公告)号：US07759213B2
公开(公告)日：2010-07-20
申请号：US12189344
申请日：2008-08-11
IPC分类号： H01L21/76
CPC分类号： H01L21/02381 , H01L21/02529 , H01L21/0262 , H01L21/02639 , H01L29/66636 , H01L29/7848
摘要： Trenches are formed in a silicon substrate by etching exposed portions of the silicon substrate. After covering areas on which deposition of Si:C containing material is to be prevented, selective epitaxy is performed in a single wafer chamber at a temperature from about 550° C. to about 600° C. employing a limited carrier gas flow, i.e., at a flow rate less than 12 standard liters per minute to deposit Si:C containing regions at a pattern-independent uniform deposition rate. The inventive selective epitaxy process for Si:C deposition provides a relatively high net deposition rate a high quality Si:C crystal in which the carbon atoms are incorporated into substitutional sites as verified by X-ray diffraction.
摘要翻译： 通过蚀刻硅衬底的暴露部分在硅衬底中形成沟槽。 在覆盖要防止沉积含Si：C的材料的区域之后，使用有限的载气流在约550℃至约600℃的温度下，在单晶片室中进行选择性外延，即， 以小于12标准升/分钟的流速，以不依赖于图案的均匀沉积速率沉积含Si：C的区域。 用于Si：C沉积的本发明的选择性外延工艺提供了相对较高的净沉积速率，其中通过X射线衍射验证碳原子并入到取代位置的高质量Si：C晶体。
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公开(公告)号：US20120205749A1
公开(公告)日：2012-08-16
申请号：US13025474
申请日：2011-02-11
IPC分类号： H01L27/092 , H01L21/762 , H01L21/8238
CPC分类号： H01L21/823814 , H01L21/76224 , H01L21/823807
摘要： Epitaxial deposition of silicon germanium in a semiconductor device is achieved without using masks. Nucleation delays induced by interactions with dopants present before deposition of the silicon germanium are used to determine a period over which an exposed substrate surface may be subjected to epitaxial deposition to form a layer of SiGe on desired parts with substantially no deposition on other parts. Dopant concentration may be changed to achieve desired thicknesses within preferred deposition times. Resulting deposited SiGe is substantially devoid of growth edge effects.
摘要翻译： 在不使用掩模的情况下实现硅锗在半导体器件中的外延沉积。 使用在沉积硅锗之前与存在的掺杂剂的相互作用引起的成核延迟来确定暴露的衬底表面可以经历外延沉积以在所需部分上形成SiGe层的周期，而在其它部分上基本上没有沉积。 可以改变掺杂剂浓度以在优选的沉积时间内实现期望的厚度。 导致沉积的SiGe基本上没有生长边缘效应。
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公开(公告)号：US08389352B2
公开(公告)日：2013-03-05
申请号：US13025474
申请日：2011-02-11
IPC分类号： H01L21/8238
CPC分类号： H01L21/823814 , H01L21/76224 , H01L21/823807
摘要： Epitaxial deposition of silicon germanium in a semiconductor device is achieved without using masks. Nucleation delays induced by interactions with dopants present before deposition of the silicon germanium are used to determine a period over which an exposed substrate surface may be subjected to epitaxial deposition to form a layer of SiGe on desired parts with substantially no deposition on other parts. Dopant concentration may be changed to achieve desired thicknesses within preferred deposition times. Resulting deposited SiGe is substantially devoid of growth edge effects.
摘要翻译： 在不使用掩模的情况下实现硅锗在半导体器件中的外延沉积。 使用在沉积硅锗之前与存在的掺杂剂的相互作用引起的成核延迟来确定暴露的衬底表面可以经历外延沉积以在所需部分上形成SiGe层的周期，而在其它部分上基本上没有沉积。 可以改变掺杂剂浓度以在优选的沉积时间内实现期望的厚度。 导致沉积的SiGe基本上没有生长边缘效应。
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公开(公告)号：US08354314B2
公开(公告)日：2013-01-15
申请号：US13025474
申请日：2011-02-11
IPC分类号： H01L21/8238
摘要： Epitaxial deposition of silicon germanium in a semiconductor device is achieved without using masks. Nucleation delays induced by interactions with dopants present before deposition of the silicon germanium are used to determine a period over which an exposed substrate surface may be subjected to epitaxial deposition to form a layer of SiGe on desired parts with substantially no deposition on other parts. Dopant concentration may be changed to achieve desired thicknesses within preferred deposition times. Resulting deposited SiGe is substantially devoid of growth edge effects.
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公开(公告)号：US08173524B1
公开(公告)日：2012-05-08
申请号：US13004201
申请日：2011-01-11
CPC分类号： H01L29/165 , H01L21/0237 , H01L21/02529 , H01L21/02639 , H01L29/78 , H01L29/7848
摘要： Methods form epitaxial materials by forming at least two gate stacks on a silicon substrate and forming sidewall spacers on sides of the gate stacks. Such methods pattern a recess in the silicon substrate between adjacent ones of the gate stacks. The methods also provide a liner in a bottom of the recess, and epitaxially grow epitaxial material from sidewalls of the recess to fill the recess with the epitaxial material.
摘要翻译： 方法通过在硅衬底上形成至少两个栅极叠层并在栅叠层的侧面上形成侧壁间隔来形成外延材料。 这种方法在相邻的栅叠层之间的硅衬底中形成凹陷。 该方法还在凹槽的底部提供衬垫，并且从凹槽的侧壁外延生长外延材料，以用外延材料填充凹部。
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10.发明申请POLYGRAIN ENGINEERING BY ADDING IMPURITIES IN THE GAS PHASE DURING CHEMICAL VAPOR DEPOSITION OF POLYSILICON 审中-公开通过在多晶硅化学气相沉积期间在气相中添加污染物进行聚合工程公开(公告)号：US20090269926A1
公开(公告)日：2009-10-29
申请号：US12110594
申请日：2008-04-28
IPC分类号： H01L21/44
CPC分类号： H01L21/28035 , H01L29/4925
摘要： A method of forming at least one gate conductor of a complementary metal oxide semiconductor performs a chemical vapor deposition process of polysilicon over a surface where a polysilicon gate is to be located. This deposition can be performed through a mask to form gate structures directly, or a later patterning process can pattern the polysilicon into gate structures. During the chemical vapor deposition process, the method adds impurities in the chemical vapor deposition process to optimize the grain size of the polysilicon according to a number of different methods.
摘要翻译： 形成互补金属氧化物半导体的至少一个栅极导体的方法在多晶硅栅极位于的表面上进行多晶硅的化学气相沉积处理。 该沉积可以通过掩模进行直接形成栅极结构，或者后来的图案化工艺可以将多晶硅图案化成栅极结构。 在化学气相沉积过程中，该方法根据多种不同的方法在化学气相沉积工艺中添加杂质以优化多晶硅的晶粒尺寸。
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