公开(公告)号：US11978742B2

公开(公告)日：2024-05-07

申请号：US18137032

申请日：2023-04-20

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Masahiro Takahashi ,  Takuya Hirohashi ,  Masashi Tsubuku ,  Noritaka Ishihara ,  Masashi Oota

IPC: H01L27/12 ,  C23C14/08 ,  G01N23/207 ,  G02F1/1368 ,  H01L21/66 ,  H01L29/04 ,  H01L29/24 ,  H01L29/66 ,  H01L29/786 ,  H01L21/02

CPC classification number: H01L27/1225 ,  C23C14/086 ,  G01N23/207 ,  G02F1/1368 ,  H01L22/12 ,  H01L29/04 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78693 ,  H01L21/0237 ,  H01L21/02422 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L2924/0002 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A metal oxide film including a crystal part and having highly stable physical properties is provided. The size of the crystal part is less than or equal to 10 nm, which allows the observation of circumferentially arranged spots in a nanobeam electron diffraction pattern of the cross section of the metal oxide film when the measurement area is greater than or equal to 5 nmφ and less than or equal to 10 nmφ.

公开(公告)号：US11837472B2

公开(公告)日：2023-12-05

申请号：US17410427

申请日：2021-08-24

Applicant: AKHAN Semiconductor, Inc.

Inventor： Adam Khan

IPC: H01L21/04 ,  H01L29/16 ,  H01L29/78 ,  H01L29/868 ,  H01L21/02 ,  H01L33/34 ,  H01L21/3065 ,  H01L31/028 ,  H01L29/66 ,  H01L29/06 ,  H01L33/00 ,  H01L29/778

CPC classification number: H01L21/0415 ,  H01L21/0237 ,  H01L21/0262 ,  H01L21/02085 ,  H01L21/02381 ,  H01L21/02444 ,  H01L21/02488 ,  H01L21/02527 ,  H01L21/02576 ,  H01L21/043 ,  H01L21/3065 ,  H01L29/06 ,  H01L29/1602 ,  H01L29/6603 ,  H01L29/66045 ,  H01L29/78 ,  H01L29/868 ,  H01L31/028 ,  H01L33/34 ,  H01L21/02573 ,  H01L29/1606 ,  H01L29/7781 ,  H01L33/005 ,  Y02E10/547

Abstract: Disclosed herein is a new and improved system and method for fabricating monolithically integrated diamond semiconductor. The method may include the steps of seeding the surface of a substrate material, forming a diamond layer upon the surface of the substrate material; and forming a semiconductor layer within the diamond layer, wherein the diamond semiconductor of the semiconductor layer has n-type donor atoms and a diamond lattice, wherein the donor atoms contribute conduction electrons with mobility greater than 770 cm.sup.2/Vs to the diamond lattice at 100 kPa and 300K, and Wherein the n-type donor atoms are introduced to the lattice through ion tracks.

公开(公告)号：US20230238235A1

公开(公告)日：2023-07-27

申请号：US17746452

申请日：2022-05-17

Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC.

Inventor： Tao CHEN

IPC: H01L21/02 ,  H01L29/10 ,  H01L21/28 ,  H01L29/51

CPC classification number: H01L21/02197 ,  H01L29/1079 ,  H01L21/28088 ,  H01L29/517 ,  H01L21/0237

Abstract: Embodiments of the present disclosure disclose a semiconductor device and a method for manufacturing the same. The semiconductor device includes: a substrate; a gate layer located on the substrate; a first conduction layer and a second conduction layer located on the gate layer and including a perovskite as the material thereof; a first source and a first drain spaced apart from each other and connected with either end of the first conduction layer respectively; a second source and a second drain spaced apart from each other and connected with either end of the second conduction layer respectively.

公开(公告)号：US10074536B2

公开(公告)日：2018-09-11

申请号：US14506091

申请日：2014-10-03

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Anthony J. Lochtefeld

IPC: H01L21/02 ,  H01L21/20 ,  H01L21/8258 ,  H01L29/165 ,  H01L29/06 ,  H01L29/267 ,  H01L29/66

CPC classification number: H01L21/02488 ,  H01L21/0237 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02538 ,  H01L21/0254 ,  H01L21/02546 ,  H01L21/0262 ,  H01L21/02645 ,  H01L21/02647 ,  H01L21/2018 ,  H01L21/8258 ,  H01L29/0657 ,  H01L29/165 ,  H01L29/267 ,  H01L29/66795

Abstract: Lattice-mismatched materials having configurations that trap defects within sidewall-containing structures.

公开(公告)号：US10038115B2

公开(公告)日：2018-07-31

申请号：US15634583

申请日：2017-06-27

Applicant: GLO AB

Inventor： Carl Patrik Theodor Svensson ,  Nathan Gardner

IPC: H01L21/00 ,  H01L33/00 ,  H01L33/24 ,  H01L33/16 ,  H01L21/02 ,  H01L33/06 ,  H01L33/44 ,  B82Y20/00 ,  H01L33/08

CPC classification number: H01L33/0075 ,  B82Y20/00 ,  H01L21/0237 ,  H01L21/02439 ,  H01L21/02458 ,  H01L21/02505 ,  H01L21/02513 ,  H01L21/02521 ,  H01L21/0254 ,  H01L21/02603 ,  H01L21/02639 ,  H01L33/007 ,  H01L33/06 ,  H01L33/08 ,  H01L33/16 ,  H01L33/24 ,  H01L33/44 ,  H01L2933/0025

Abstract: A LED structure includes a support and a plurality of nanowires located on the support, where each nanowire includes a tip and a sidewall. A method of making the LED structure includes reducing or eliminating the conductivity of the tips of the nanowires compared to the conductivity of the sidewalls during or after creation of the nanowires.

公开(公告)号：US10032958B2

公开(公告)日：2018-07-24

申请号：US14742798

申请日：2015-06-18

Applicant: NGK INSULATORS, LTD.

Inventor： Shuuhei Higashihara ,  Makoto Iwai

IPC: H01L33/00 ,  H01L33/32 ,  C30B19/12 ,  H01L33/20 ,  H01L21/02 ,  C30B9/10 ,  C30B19/02 ,  C30B29/40 ,  H01L33/16 ,  H01L33/12

CPC classification number: H01L33/32 ,  C30B9/10 ,  C30B19/02 ,  C30B19/12 ,  C30B29/406 ,  H01L21/0237 ,  H01L21/0254 ,  H01L21/0262 ,  H01L33/0075 ,  H01L33/12 ,  H01L33/16 ,  H01L33/20

Abstract: A seed crystal substrate 8 includes a base body 1 and a plurality of rows of stripe-shaped seed crystal layers 3 formed on the base body 1. An upper face 3a of the seed crystal layer 3 is (11-22) plane, a groove 4 is formed between the adjacent seed crystal layers 3, and a longitudinal direction of the groove 4 is a direction in which a c-axis of a crystal forming the seed crystal layer is projected on the upper face. A nitride of a group 13 element is formed on the seed crystal substrate.

公开(公告)号：US20180197780A1

公开(公告)日：2018-07-12

申请号：US15912740

申请日：2018-03-06

Applicant: International Business Machines Corporation

Inventor： Karthik Balakrishnan ,  Kangguo Cheng ,  Pouya Hashemi ,  Alexander Reznicek

IPC: H01L21/8258 ,  H01L27/092 ,  H01L29/78 ,  H01L21/02 ,  H01L21/8238 ,  H01L21/8252

CPC classification number: H01L21/8258 ,  H01L21/0237 ,  H01L21/02381 ,  H01L21/02395 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/02546 ,  H01L21/02617 ,  H01L21/823807 ,  H01L21/823821 ,  H01L21/8252 ,  H01L21/8256 ,  H01L27/0924 ,  H01L29/0649 ,  H01L29/16 ,  H01L29/7847 ,  H01L29/7849 ,  H01L29/785

Abstract: In one example, a device includes a p-type field effect transistor region and n-type field effect transistor region. The p-type field effect transistor region includes at least one fin including strained germanium. The n-type field effect transistor region also includes at least one fin including strained germanium.

公开(公告)号：US10000381B2

公开(公告)日：2018-06-19

申请号：US14860226

申请日：2015-09-21

Applicant: GEORGIA TECH RESEARCH CORPORATION

Inventor： Michael William Moseley ,  William Alan Doolittle

IPC: H01L29/30 ,  C01B21/06 ,  C30B23/02 ,  C30B29/40 ,  H01L21/02 ,  H01L21/205 ,  H01L29/20

CPC classification number: C01B21/0632 ,  C01P2006/40 ,  C01P2006/90 ,  C30B23/02 ,  C30B29/403 ,  C30B29/406 ,  H01L21/0237 ,  H01L21/0254 ,  H01L21/02631 ,  H01L21/2056 ,  H01L29/2003 ,  H01L29/30

Abstract: Systems and methods for MBE growing of group-III Nitride alloys, comprising establishing an average reaction temperature range from about 250 C to about 850 C; introducing a nitrogen flux at a nitrogen flow rate; introducing a first metal flux at a first metal flow rate; and periodically stopping and restarting the first metal flux according to a first flow duty cycle. According to another embodiment, the system comprises a nitrogen source that provides nitrogen at a nitrogen flow rate, and, a first metal source comprising a first metal effusion cell that provides a first metal at a first metal flow rate, and a first metal shutter that periodically opens and closes according to a first flow duty cycle to abate and recommence the flow of the first metal from the first metal source. Produced alloys include AlN, InN, GaN, InGaN, and AlInGaN.

公开(公告)号：US20180158672A1

公开(公告)日：2018-06-07

申请号：US15876048

申请日：2018-01-19

Applicant: Tivra Corporation

Inventor： Francisco Machuca

IPC: H01L21/02 ,  H01L23/373

CPC classification number: H01L21/0254 ,  H01L21/0237 ,  H01L21/0242 ,  H01L21/02422 ,  H01L21/02425 ,  H01L21/02444 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02502 ,  H01L21/02505 ,  H01L21/02513 ,  H01L21/02617 ,  H01L23/36 ,  H01L23/3738 ,  H01L29/045 ,  H01L29/10 ,  H01L29/2003 ,  H01L33/007 ,  H01L33/12 ,  H01L33/32

Abstract: A multilayer semiconductor structure including at least in part a substrate and an III-N film layer. The substrate's constant of thermal expansion being substantially matched to the III-N film's constant of thermal expansion. The multilayer semiconductor structure may also include a crystal matching layer that has a lattice constant that substantially matches the lattice of constant of the III-N film. By not relying on the substrate for lattice matching the III-N film, the multilayer structure allows greater flexibility in the selection of an applicable substrate.

公开(公告)号：US09978894B2

公开(公告)日：2018-05-22

申请号：US15470628

申请日：2017-03-27

Applicant: Robbie J. Jorgenson

Inventor： Robbie J. Jorgenson

IPC: H01L31/0304 ,  H01L21/02 ,  H01L31/0352 ,  H01L31/18 ,  H01L33/00 ,  H01L33/06 ,  H01L33/10 ,  B82Y20/00 ,  G02B6/122 ,  H01L29/20 ,  H01L33/32 ,  H01L41/187 ,  H01L31/0232 ,  H03H9/02

CPC classification number: H01L31/03044 ,  B82Y20/00 ,  G02B6/1225 ,  H01L21/0237 ,  H01L21/02458 ,  H01L21/02491 ,  H01L21/02507 ,  H01L21/0254 ,  H01L29/2003 ,  H01L31/02327 ,  H01L31/035209 ,  H01L31/1856 ,  H01L33/007 ,  H01L33/0075 ,  H01L33/06 ,  H01L33/10 ,  H01L33/32 ,  H01L41/187 ,  H01L2933/0058 ,  H03H9/02015 ,  H03H9/02543

Abstract: The present invention provides materials, structures, and methods for III-nitride-based devices, including epitaxial and non-epitaxial structures useful for III-nitride devices including light emitting devices, laser diodes, transistors, detectors, sensors, and the like. In some embodiments, the present invention provides metallo-semiconductor and/or metallo-dielectric devices, structures, materials and methods of forming metallo-semiconductor and/or metallo-dielectric material structures for use in semiconductor devices, and more particularly for use in III-nitride based semiconductor devices. In some embodiments, the present invention includes materials, structures, and methods for improving the crystal quality of epitaxial materials grown on non-native substrates. In some embodiments, the present invention provides materials, structures, devices, and methods for acoustic wave devices and technology, including epitaxial and non-epitaxial piezoelectric materials and structures useful for acoustic wave devices. In some embodiments, the present invention provides metal-base transistor devices, structures, materials and methods of forming metal-base transistor material structures for use in semiconductor devices.