公开(公告)号：US20160116779A1

公开(公告)日：2016-04-28

申请号：US14968866

申请日：2015-12-14

Applicant: Au Optronics Corporation

Inventor： Chia-Chun Yeh ,  Yu-Feng Chien ,  Wen-Rei Guo ,  Hung-Wen Chou ,  Chin-Chuan Liu ,  Po-Yuan Liu

IPC: G02F1/1333 ,  G02F1/1335 ,  G06F3/041

CPC classification number: G02F1/13338 ,  G02F1/133345 ,  G02F1/133512 ,  G02F1/133514 ,  G02F1/136209 ,  G06F3/0412 ,  G06F3/044 ,  G06F2203/04103

Abstract: A touch display panel including an active device array substrate, an opposite substrate and a liquid crystal layer is provided. The active device array substrate includes a first substrate, a black matrix, a touch-sensing device layer, a dielectric layer and an active device array layer. The black matrix is disposed on the first substrate. The touch-sensing device layer is disposed on the first substrate to cover a portion of the black matrix. The dielectric layer covers the touch-sensing device layer. The active device array layer is disposed on the dielectric layer. The touch-sensing device layer and the active device array substrate are located at two opposite sides of the dielectric layer. The liquid crystal layer is disposed between the active device array layer and the opposite substrate. Moreover, a fabricating method of the touch display panel is also provided.

公开(公告)号：US10950636B2

公开(公告)日：2021-03-16

申请号：US16792291

申请日：2020-02-16

Applicant: Au Optronics Corporation

Inventor： Shu-Hao Huang ,  Chin-Chuan Liu ,  Sung-Yu Su

IPC: H01L27/12 ,  G02F1/1333 ,  G02F1/1362 ,  H01L29/786 ,  G02F1/1368

Abstract: A method for fabricating an array substrate is provided. A gate insulation layer, first and second gates and a first interlayered insulation layer are formed on first and second active layers in order. A photolithography and etching process is performed by using a photo mask to form first to fourth contact holes in the gate insulation layer and the first interlayered insulation layer. First and second sources and first and second drains which are respectively connected to the first and second active layers through the first to fourth contact holes are formed. A second interlayered insulation layer is formed. Another photolithography and etching process is performed by using said photo mask to form first to third openings and a via hole in the second interlayered insulation layer, wherein along a normal direction, the third opening and the first contact hole are overlapped, the via hole and the second contact hole are overlapped, the first opening and the third contact hole are overlapped, and the second opening and the fourth contact hole are overlapped.

公开(公告)号：US20200185432A1

公开(公告)日：2020-06-11

申请号：US16792291

申请日：2020-02-16

Applicant: Au Optronics Corporation

Inventor： Shu-Hao Huang ,  Chin-Chuan Liu ,  Sung-Yu Su

IPC: H01L27/12 ,  H01L29/786 ,  G02F1/1368 ,  G02F1/1362 ,  G02F1/1333

Abstract: A method for fabricating an array substrate is provided. A gate insulation layer, first and second gates and a first interlayered insulation layer are formed on first and second active layers in order. A photolithography and etching process is performed by using a photo mask to form first to fourth contact holes in the gate insulation layer and the first interlayered insulation layer. First and second sources and first and second drains which are respectively connected to the first and second active layers through the first to fourth contact holes are formed. A second interlayered insulation layer is formed. Another photolithography and etching process is performed by using said photo mask to form first to third openings and a via hole in the second interlayered insulation layer, wherein along a normal direction, the third opening and the first contact hole are overlapped, the via hole and the second contact hole are overlapped, the first opening and the third contact hole are overlapped, and the second opening and the fourth contact hole are overlapped.

公开(公告)号：US11664457B2

公开(公告)日：2023-05-30

申请号：US17312706

申请日：2019-06-04

Applicant: AU Optronics (Kunshan) Co., Ltd. ,  AU OPTRONICS CORPORATION

Inventor： Chin-Chuan Liu ,  Fu-Liang Lin

IPC: H01L29/786 ,  H01L23/552 ,  H01L27/12 ,  H01L29/66

CPC classification number: H01L29/78633 ,  H01L23/552 ,  H01L27/1222 ,  H01L29/66757 ,  H01L29/78666 ,  H01L29/78675

Abstract: The invention provides a display device and a method of manufacturing a thin film transistor. The method of manufacturing a thin film transistor comprises: (A) providing a substrate; (B) forming a light shielding layer on the substrate, and patterning the light shielding layer to form a patterned light shielding layer; (C) forming a buffer layer on the substrate; (D) forming a semiconductor layer on the substrate, and patterning the semiconductor layer to form a patterned semiconductor layer; (E) forming an insulating layer on the substrate; and (F) forming a conductive layer on the substrate, and patterning the conductive layer to form a patterned conductive layer; wherein the same mask is used for patterning the light shielding layer and the semiconductor layer. Photoelectric effect of the thin film transistor outside the display region can be effectively avoided, while reducing the number of masks in the production process.

公开(公告)号：US20190035825A1

公开(公告)日：2019-01-31

申请号：US15784211

申请日：2017-10-16

Applicant: Au Optronics Corporation

Inventor： Shu-Hao Huang ,  Chin-Chuan Liu ,  Sung-Yu Su

IPC: H01L27/12 ,  H01L29/786 ,  G02F1/1368 ,  G02F1/1333 ,  G02F1/1362

Abstract: A method for fabricating an array substrate is provided. A gate insulation layer, first and second gates and a first interlayered insulation layer are formed on first and second active layers in order. A photolithography and etching process is performed by using a photo mask to form first to fourth contact holes in the gate insulation layer and the first interlayered insulation layer. First and second sources and first and second drains which are respectively connected to the first and second active layers through the first to fourth contact holes are formed. A second interlayered insulation layer is formed. Another photolithography and etching process is performed by using said photo mask to form first to third openings and a via hole in the second interlayered insulation layer, wherein along a normal direction, the third opening and the first contact hole are overlapped, the via hole and the second contact hole are overlapped, the first opening and the third contact hole are overlapped, and the second opening and the fourth contact hole are overlapped.

公开(公告)号：US11973086B2

公开(公告)日：2024-04-30

申请号：US17312654

申请日：2019-10-21

Applicant: AU Optronics (Kunshan) Co., Ltd. ,  AU Optronics Corporation

Inventor： Chin-Chuan Liu ,  Fu Liang Lin

IPC: H01L27/12

CPC classification number: H01L27/124 ,  H01L27/1225 ,  H01L27/1251

Abstract: The invention discloses a display panel, comprising: a first substrate including a display region and a peripheral region adjacent to each other; a plurality of pixel units disposed on the first substrate and located in the display region; a control circuit disposed on the first substrate, located in the peripheral region and electrically connected to the pixel units; a planarization layer disposed on the first substrate, extending from the display region to the peripheral region and covering the pixel units and the control circuit; and a bonding pad disposed on the first substrate and located above the planarization layer; wherein a projection area of the bonding pad on the first substrate and a projection area of the control circuit on the first substrate have an overlapped region.

公开(公告)号：US09785005B2

公开(公告)日：2017-10-10

申请号：US14968866

申请日：2015-12-14

Applicant: Au Optronics Corporation

Inventor： Chia-Chun Yeh ,  Yu-Feng Chien ,  Wen-Rei Guo ,  Hung-Wen Chou ,  Chin-Chuan Liu ,  Po-Yuan Liu

IPC: G02F1/1362 ,  G02F1/1333 ,  G06F3/044 ,  G02F1/1335 ,  G06F3/041

CPC classification number: G02F1/13338 ,  G02F1/133345 ,  G02F1/133512 ,  G02F1/133514 ,  G02F1/136209 ,  G06F3/0412 ,  G06F3/044 ,  G06F2203/04103

Abstract: A touch display panel including an active device array substrate, an opposite substrate and a liquid crystal layer is provided. The active device array substrate includes a first substrate, a black matrix, a touch-sensing device layer, a dielectric layer and an active device array layer. The black matrix is disposed on the first substrate. The touch-sensing device layer is disposed on the first substrate to cover a portion of the black matrix. The dielectric layer covers the touch-sensing device layer. The active device array layer is disposed on the dielectric layer. The touch-sensing device layer and the active device array substrate are located at two opposite sides of the dielectric layer. The liquid crystal layer is disposed between the active device array layer and the opposite substrate. Moreover, a fabricating method of the touch display panel is also provided.