公开(公告)号：US10802447B1

公开(公告)日：2020-10-13

申请号：US16415162

申请日：2019-05-17

Applicant: BAE Systems Information and Electronic Systems Integration Inc.

Inventor： Kevin Grout

IPC: H03M1/12 ,  G04F10/00 ,  H03K5/151 ,  H03L7/081 ,  H03L7/16 ,  H03L7/099

Abstract: The present disclosure relates to a circuit and method of operation thereof for linearized time amplifier architecture for sub-picosecond resolution. More particularly, the disclosure is directed to an asymmetric edge manipulator whose output is fed to four series of transistors and is operatively coupled to a reset. The disclosure relates to outputting a pair of signals that correspond to a first input and second input of a known and measured clock that may be adjustable with gain to be perceptible to an external device that can then correct for the gain to allow measurement of sub-picosecond resolution.

公开(公告)号：US20250111881A1

公开(公告)日：2025-04-03

申请号：US18477058

申请日：2023-09-28

Applicant: BAE Systems Information and Electronic Systems Integration Inc.

Inventor： Gary M. Madison ,  Kevin Grout

IPC: H03K17/687 ,  H03K17/60 ,  H03K19/0175

Abstract: A sample and hold amplifier output buffer with the low leakage of metal oxide semiconductor field effect transistors (MOSFET) combined with the linearity and dynamic range of silicon-germanium (SiGe) bipolar junction transistors (BJT). In one aspect, the present disclosure provides a sample and hold amplifier output buffer placing a MOSFET input device between the base and emitter of a high linearity SiGe BJT.

公开(公告)号：US11223365B1

公开(公告)日：2022-01-11

申请号：US17123384

申请日：2020-12-16

Applicant: BAE Systems Information and Electronic Systems Integration Inc.

Inventor： Kevin Grout

IPC: H03M1/60 ,  H03M1/08 ,  H03M1/12 ,  H03M1/06 ,  G04F10/00 ,  H03M1/00

Abstract: A system and method for suppressing aperture noise resulting from clock jitter associated with a Nyquist analog-to-digital converter (ADC) using self-referred time measurements are provided. The system comprises of a clock, a delay element, a time subtractor, a time-to-digital converter, a filter element, a first digital subtractor, an integrator, a differentiator, and a multiplier. Each of the delay element, time subtractor, time-to-digital converter, filter element, first digital subtractor, integrator, and multiplier is electrically connected in parallel with the ADC, which allows the clock to generate a clock signal that advances into the system and the ADC in order to isolate and suppress the noise aperture associated with the ADC. As such, the architecture of the system is configured to isolate and suppress aperture noise resulting from clock jitter associated with an analog-to-digital converter (ADC) to allow the output signal of the system be independent of the aperture noise.

公开(公告)号：US12288587B2

公开(公告)日：2025-04-29

申请号：US18477058

申请日：2023-09-28

Applicant: BAE Systems Information and Electronic Systems Integration Inc.

Inventor： Gary M. Madison ,  Kevin Grout

IPC: G11C27/02 ,  H03K17/60 ,  H03K17/687 ,  H03K19/0175

Abstract: A sample and hold amplifier output buffer with the low leakage of metal oxide semiconductor field effect transistors (MOSFET) combined with the linearity and dynamic range of silicon-germanium (SiGe) bipolar junction transistors (BJT). In one aspect, the present disclosure provides a sample and hold amplifier output buffer placing a MOSFET input device between the base and emitter of a high linearity SiGe BJT.