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    Sample and hold circuit
    1.
    发明授权
    Sample and hold circuit 失效

    公开(公告)号：US3610958A

    公开(公告)日：1971-10-05

    申请号：US3610958D

    申请日：1969-05-19

    Applicant: BELL TELEPHONE LABOR INC

    Inventor： REILING PAUL A

    IPC: G11C27/02 ,  G11C11/34

    CPC classification number: G11C27/024

    Abstract: In a sample and hold circuit the fixed contacts of a doublethrow switch are connected to the terminals of a storage capacitor. The movable contact of the double-throw switch is connected to ground, and the capacitor is connected to a source of input signals. When the switch is in one position, the input signal is sampled. When the switch is in the other position, the discharge path for the capacitor is blocked, and the signal sample is held thereon. Activation of the double-throw switch may be from a grounded or unbalanced source, and hence, there being no need for pulse transformers or similar circuitry, the entire circuit can be constructed readily using thin film or integrated circuit techniques.

    Analog-to-digital converter
    4.
    发明授权
    Analog-to-digital converter 失效

    公开(公告)号：US3585635A

    公开(公告)日：1971-06-15

    申请号：US3585635D

    申请日：1968-12-23

    Applicant: BELL TELEPHONE LABOR INC

    Inventor： REILING PAUL A

    IPC: H03M1/00 ,  H03K13/175

    CPC classification number: H03M1/00 ,  H03M1/22

    Abstract: Parallel transistor-resistor combinations are respectively connected into two conduction paths supplied by a constant current source, and a sampled analog input signal is applied in common to the base terminals of the transistors. Voltage pairs defining predetermined voltage intervals are applied to the respective emitters of the transistors such that one of the transistors is turned ON if the input signal is within one of the predetermined voltage intervals. A difference circuit bridged across the collectors of the transistors yields an output representative of a binary digit.

    Analog-to-digital converter
    6.
    发明授权
    Analog-to-digital converter 失效

    公开(公告)号：US3573798A

    公开(公告)日：1971-04-06

    申请号：US3573798D

    申请日：1967-12-18

    Applicant: BELL TELEPHONE LABOR INC

    Inventor： REILING PAUL A

    IPC: H03M1/00 ,  H03K13/17

    CPC classification number: H03M1/361

    Abstract: A plurality of parallel transistor-resistor combinations are serially connected into two conduction paths extending between a constant current source and ground. When an analog input signal is applied in common to the base terminals of the transistors, a certain number of the resistances connected in parallel therewith are short-circuited, and difference circuit bridged across the conduction paths yields an output representative of a binary digit.

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