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    Time division switching system
    1.
    发明授权
    Time division switching system 失效
    时分切换系统

    公开(公告)号：US3694580A

    公开(公告)日：1972-09-26

    申请号：US3694580D

    申请日：1971-07-28

    Applicant: BELL TELEPHONE LABOR INC

    Inventor： INOSE HIROSHI ,  SAITO TADAO

    IPC: H04Q11/06 ,  H04J3/00

    CPC classification number: H04Q11/06

    Abstract: A time division switching system includes first and second groups of time division buses and a crosspoint network for interconnecting the buses of the first group to the buses of the second group. On each time division bus, interleaved PCM codes are transmitted in a plurality of m time slots. Each time slot is divided into a plurality of bit intervals and each bit interval is divided into n positions whereby n interleaved PCM codes are transmitted in each time slot. A control circuit operates to selectively enable the crosspoint gates to transfer PCM code bits from the first group buses to the second group buses in each position. A control memory is provided for each path of the group having the lesser number of paths. Control codes are stored in the memory, each of which determines the operation of the gates connected to the path associated with the memory during a time slot. Each memory has a capacity corresponding to the number of paths in the group having the greater number of paths multiplied by m n.

    Abstract translation: 时分交换系统包括第一组和第二组时分母线和用于将第一组的总线与第二组的总线相互连接的交叉点网络。 在每个分时总线上，在多个m个时隙中发送交错PCM码。 每个时隙被分成多个比特间隔，并且每个比特间隔被划分为n个位置，由此在每个时隙中发送n个交织的PCM码。 控制电路用于选择性地使得交叉点门将PCM码位从第一组总线传送到每个位置中的第二组总线。 为具有较少数目的路径的组的每个路径提供控制存储器。 控制码存储在存储器中，每个存储器在时隙期间确定连接到与存储器相关联的路径的门的操作。 每个存储器具有对应于具有更多路径乘以m n的组中的路径数量的容量。

    Multiplexed information transmission system
    3.
    发明授权
    Multiplexed information transmission system 失效
    多路复用信息传输系统

    公开(公告)号：US3692942A

    公开(公告)日：1972-09-19

    申请号：US3692942D

    申请日：1971-06-07

    Applicant: BELL TELEPHONE LABOR INC

    Inventor： INOSE HIROSHI ,  SAITO TADAO ,  TOKUNAGA TAKEHISA ,  TOMIZAWA KENJI

    IPC: H04J3/22 ,  H04J3/06 ,  H04J3/16

    CPC classification number: H04J3/0626 ,  H04J3/1629 ,  Y10S370/916

    Abstract: A time division multiplex communication system operates to combine the transmissions from the plurality of low speed multiplex paths onto a single high speed path having a transmission rate of C. The incoming information from each low speed path is stored in a buffer memory. A gating circuit selectively applies the stored information from the buffer memory to the high speed path in assigned time slots of said high speed path. A control unit connected to each gating circuit selectively enables one of said gating circuits in each time slot of said outgoing path in accordance with an algorithm which applies said stored information to said outgoing path in a quasi-uniform manner.

    Abstract translation: 时分复用通信系统将来自多个低速多路复用路径的传输组合到具有传输速率为C的单个高速路径上。来自每个低速路径的输入信息被存储在缓冲存储器中。 门控电路在所述高速路径的分配时隙中选择性地将存储的信息从缓冲存储器应用到高速路径。 连接到每个选通电路的控制单元根据将所述存储的信息以准均匀方式应用于所述输出路径的算法选择性地使所述输出路径的每个时隙中的所述选通电路中的一个启动。

    Time division communication system
    5.
    发明授权
    Time division communication system 失效
    时间通信系统

    公开(公告)号：US3632884A

    公开(公告)日：1972-01-04

    申请号：US3632884D

    申请日：1969-08-13

    Applicant: BELL TELEPHONE LABOR INC

    Inventor： INOSE HIROSHI ,  SAITO TADAO

    IPC: H04Q11/06 ,  H04J3/16

    CPC classification number: H04Q11/06

    Abstract: A time division communication system is disclosed in which the multiplexed content of a plurality of transmission highways is further interleaved on a superhighway and in which pulse shifting devices in a switching center transpose information among the transmission highways in order to obviate blocking in the transfer of information between superhighways.

    Abstract translation: 公开了一种时分通信系统，其中多个传输高速公路的多路复用内容在高速公路上进一步交织，并且交换中心中的脉冲移位装置在传输高速公路之间转置信息，以便消除信息传送中的阻塞 在高速公路之间。

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