Pixel structure, driving method thereof and display device

    公开(公告)号:US11587506B2

    公开(公告)日:2023-02-21

    申请号:US17259594

    申请日:2020-03-30

    IPC分类号: G09G3/3233

    摘要: Pixel structure, driving method thereof and display device are disclosed. The pixel structure includes: light-emitting device having first electrode coupled to corresponding first voltage line. Driving chip includes: receiving circuit configured to decode first digital clock signal on first control line in display phase to obtain first address data and light emission data; address storage circuit configured to store reference address data before the display phase; data processing circuit configured to output PWM signal and current control signal corresponding to each light-emitting device according to the light emission data when the first address data is the same as the reference address data; current output circuit configured to output driving current according to the current control signal; and gating circuit configured to sequentially receive the PWM signal corresponding to each light-emitting device and transmit the driving current to the output terminal when the PWM signal is in active-level state.

    Pixel driving chip and driving method therefor, and display apparatus

    公开(公告)号:US11322076B2

    公开(公告)日:2022-05-03

    申请号:US17418585

    申请日:2020-10-21

    IPC分类号: G09G3/32

    摘要: A pixel driving chip and a driving method therefor, and a display apparatus. The pixel driving chip includes a data input circuit, a time selection circuit, and a current control circuit; the data input circuit is configured to receive display data, and partition the display data to obtain a data partition to which the display data belongs in M data partitions that are obtained on the basis of a display data range; the time selection circuit is configured to determine, according to the data partition to which the display data belongs, an output time length corresponding to the display data, and within the output time length, output the display data to the current control circuit; the current control circuit is configured to determine, according to the display data, a driving current flowing through a light emitting element corresponding to the display data.

    Backlight driving method, display driving method, drive device and display device

    公开(公告)号:US11380271B2

    公开(公告)日:2022-07-05

    申请号:US16772226

    申请日:2019-07-31

    IPC分类号: G09G3/34 G09G3/36

    摘要: Disclosed are a backlight driving method, a display driving method, a drive device and a display device. The backlight driving method includes: receiving a frame of backlight data, wherein the frame of backlight data includes a plurality of first control signals which are respectively applied to the plurality of switching channels and serve as the switching control signals, and a plurality of second control signal groups respectively corresponding to the plurality of first control signals, each of the plurality of second control signal groups includes a plurality of second control signals which are respectively applied to the plurality of output channels and serve as the output control signals, and the plurality of first control signals are modulated non-constant width pulse signals respectively; and driving the backlight unit to emit light by using the plurality of first control signals and the plurality of second control signal groups.

    Source driving circuit, driving method and display device

    公开(公告)号:US11205372B2

    公开(公告)日:2021-12-21

    申请号:US16960574

    申请日:2019-09-23

    IPC分类号: G09G3/20

    摘要: A source driving circuit includes a buffer amplifier configured to generate a driving signal from an original driving signal. The buffer amplifier includes a first amplifier and a second amplifier. A high-level terminal of the first amplifier is coupled to the first power signal terminal, a low-level terminal is coupled to the second power signal terminal, and an output terminal is configured to output a positive polarity driving signal. A high-level terminal of the second amplifier is coupled to the third power signal terminal, a low-level terminal is coupled to the fourth power signal terminal, and an output terminal is configured to output a negative polarity driving signal. The voltage of the second power signal terminal is less than the voltage of the third power signal terminal.