Abstract:
The present application provides a touch substrate, a design structure of a touch electrode layer, a display panel, and a display device. The design structure of the touch electrode layer includes connecting portions and conducting wires. The connecting portions and the conducting wires form a plurality of meshes. One connecting portion is connected with four conducting wires. In conducting wires connected with a same connecting portion, at least one side edge of an end portion of at least one conducting wire connected with the connecting portion is provided with a depression, and a bottom edge of the depression joins an edge of the connecting portion. The touch electrode layer is prepared according to the design structure. The display panel includes the touch electrode layer. The display device includes the display panel.
Abstract:
The disclosure provides a detection substrate and a detection device. The detection substrate includes: a base substrate including a photosensitive area and a peripheral area surrounding the photosensitive area; a plurality of organic photodetectors on the base substrate which are arranged in an array in the photosensitive area, the organic photodetectors each including a first electrode, an organic photoelectric detection function layer, and a second electrode which are stacked, and the second electrodes of all organic photodetectors being integrally arranged and extending from the photosensitive area to the peripheral area; and a bias line, the bias line being a strip-shaped line extending in a first direction in the peripheral area, the bias line being electrically connected to the second electrodes in the peripheral area, and the minimum distance between the bias line and the organic photoelectric detection function layers in the second direction is greater than a preset threshold.
Abstract:
Provided is an organic light-emitting diode display substrate, including: a source/drain layer, a planarization layer and an anode layer which are laminated in sequence, wherein the source/drain layer includes at least one pair of first signal lines; the anode layer includes a common power line, wherein the common power line is provided with vent holes; overlapping areas between two first signal lines in each pair of the first signal lines and a projection pattern of the vent hole are equal, the overlapping area being greater than 0, wherein the projection pattern of the vent hole is a pattern of an orthographic projection of the vent hole in the common power line on the source/drain layer. A display panel and a display device are also provided.
Abstract:
A display substrate, a manufacturing method thereof, and a display device are provided. The display substrate includes a base substrate, organic light-emitting elements, a data line, and an electrode line. The organic light-emitting element includes a first electrode, a light-emitting layer and a second electrode sequentially stacked; the data line is located between the base substrate and the organic light-emitting element; the electrode line is on the same layer as the data line and located in a region outside a light-emitting region of the organic light-emitting element. The display substrate further includes at least one connection portion, which is in the region outside the light-emitting region and is configured to connect the electrode line and the first electrode, the connection portion is spaced apart from the second electrode, and the light-emitting layer covers the second electrode and the at least one connection portion.
Abstract:
A shift register circuit includes a denoising control sub-circuit and a denoising sub-circuit. The denoting control sub-circuit is configured to generate an alternating voltage signal according to a voltage of a first voltage terminal and a signal of a second clock signal terminal in response to a signal of a first clock signal terminal, to rectify the alternating voltage signal and then to output a signal to a first denoising control node, so that the voltage of the first denoting control node is maintained to be a voltage that enables the denoising sub-circuit to be turned on. The denoting sub-circuit is configured to denoise a scan signal output terminal in response to a voltage of the first denoising control node being the voltage that enables the denoising sub-circuit to be turned on.
Abstract:
Provided is a pixel sensing circuit, including a signal generation sub-circuit, a reset sub-circuit, an amplification sub-circuit, and a read sub-circuit. The reset sub-circuit is configured to provide a signal of a first power supply line to a first node under control of a reset signal line. The signal generation sub-circuit is configured to detect a light signal and convert the detected light signal into an electrical signal. The amplification sub-circuit is configured to provide an amplified electrical signal to a second node according to a signal provided by a second power supply line and under control of the first node. The read sub-circuit is configured to output the amplified electrical signal to a signal read line under control of a scan signal line.
Abstract:
A shift register unit circuit is disclosed that includes a first node control circuit, a second node control circuit, and a plurality of output circuits. Each of the plurality of output circuits is connected to a respective output terminal and provides a gate drive signal to the respective output terminal. Also disclosed are a method of driving the shift register unit circuit, a gate drive circuit, and a display apparatus.
Abstract:
An array substrate and a manufacturing method thereof, and a display panel are provided. The array substrate comprises: a base substrate (1), including a display region and a non-display region; and a metal conductive layer, an insulating layer (3) located above the metal conductive layer and an auxiliary conductive layer located above the insulating layer (3), formed on the base substrate (1), sequentially, wherein the metal conductive layer includes a plurality of first conducting lines (2), and the auxiliary conductive layer includes a plurality of second conducting lines (4), each of the plurality of first conducting lines (2) corresponding to at least one of the plurality of second conducting lines (4), each of the plurality of second conducting lines (4) is electrically connected with the corresponding first conducting line (2) through a connecting structure (51, 52) in the insulating layer (3), and a vertical projection of the connecting structure (51, 52) is located in the non-display region. Embodiments of the present disclosure can realize a narrow-frame display panel and are easily implemented, thereby reducing difficulty in fabricating the narrow-frame display panel.
Abstract:
A gate driving unit includes a charge pump circuit and an output circuit; the charge pump circuit is connected to a first input node, an input clock signal terminal and a first node; the charge pump circuit is configured to control a voltage signal of the first input node under the control of an input clock signal provided by the input clock signal terminal, the voltage signal of the first input node is written into the first node when the voltage signal of the first input node is a first voltage signal; the output circuit comprises a first output transistor, a control electrode of the first output transistor is connected to the first node, a first electrode of the first output transistor is connected to an output voltage terminal, and a second electrode of the first output transistor is connected to a gate driving signal output terminal.
Abstract:
Disclosed are a display panel and a display device. The display panel includes: a pixel unit, including a pixel circuit and a light-emitting element, the pixel circuit includes a driving transistor and a threshold compensation transistor; a first power line configured to supply a first power supply voltage to the pixel circuit; a blocker, electrically connected with the first power line; and a first conductive structure, connected with the gate electrode of the driving transistor, the first channel and the second channel of the threshold compensation transistor are connected by a conductive connection portion; an area of an orthographic projection of a portion of the blocker overlapping with the first conductive structure on the base substrate is larger than an area of an orthographic projection of a portion of the blocker overlapping with the conductive connection portion on the base substrate.