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公开(公告)号:US20240423046A1
公开(公告)日:2024-12-19
申请号:US18818535
申请日:2024-08-28
Applicant: BOE Technology Group Co., Ltd.
Inventor: Jiangnan LU , Guangliang SHANG , Can ZHENG , Yu FENG , Libin LIU , Jie ZHANG , Mei LI
IPC: H10K59/131 , G09G3/3208 , H10K59/121
Abstract: Provided is a display substrate, the display substrate is provided with a display area and a peripheral area around the display area, and includes a source/drain layer and an anode layer, wherein in the peripheral area, the source/drain layer includes pairs of first signal lines configured to drive circuits, and the pairs of first signal lines include clock signal lines and gate drive lines; and the anode layer includes a common power line provided with vent holes; and overlapping areas between two first signal lines in any pair of the first signal lines and a projection pattern of the vent hole are equal, the projection pattern of the vent hole being a pattern of an orthographic projection of the vent hole in the common power line onto the source/drain layer. A display panel and a display device are also provided.
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公开(公告)号:US20240155904A1
公开(公告)日:2024-05-09
申请号:US17773030
申请日:2021-05-26
Applicant: BOE Technology Group Co., Ltd.
Inventor: Xin LI , Xing FAN , Jing YANG , Shantao CHEN , Cheng HAN , Jiangnan LU , Yansong LI
IPC: H10K59/35 , H10K59/12 , H10K59/121 , H10K59/80 , H10K71/60
CPC classification number: H10K59/353 , H10K59/1201 , H10K59/1213 , H10K59/80518 , H10K71/60
Abstract: A display substrate comprises a base substrate that comprises a first display area provided with multiple sub-pixels of different colors. At least one sub-pixel comprises a light-emitting element and a pixel driving circuit for driving the light-emitting element to emit light. The light-emitting element comprises a first electrode, a second electrode, and an organic light-emitting layer provided between the first electrode and the second electrode. The first electrode is a reflective electrode and is electrically connected to the pixel driving circuit. A first structure is provided on a side of the first electrode of the light-emitting element of a sub-pixel of at least one target color close to the base substrate, and a surface of the first structure close to the first electrode is uneven.
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公开(公告)号:US20230140411A1
公开(公告)日:2023-05-04
申请号:US17905620
申请日:2021-08-12
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Guangliang SHANG , Jie ZHANG , Jiangnan LU , Mei LI , Libin LIU
IPC: G09G3/20
Abstract: A gate driving unit includes a first input node control circuit and a charge pump circuit; the first input node control circuit is configured to connect or disconnect the between an input terminal and the first input node under control of a clock signal provided by the clock signal terminal; the charge pump circuit is configured to control to convert a voltage signal of the first input node into a voltage signal of the first node under the control of an input clock signal provided by the input clock signal terminal when the voltage signal of the first input node is a first voltage signal, so that a polarity of the voltage signal of the first input is the same as a polarity of the voltage signal of the first input node, and an absolute value of the voltage value of the voltage signal of the first node is greater than an absolute value of a voltage value of the voltage signal of the first input node.
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公开(公告)号:US20230021618A1
公开(公告)日:2023-01-26
申请号:US17953941
申请日:2022-09-27
Applicant: BOE Technology Group Co., Ltd.
Inventor: Jiangnan LU , Guangliang SHANG , Can ZHENG , Yu FENG , Libin LIU , Jie ZHANG , Mei LI
IPC: H01L27/32
Abstract: Provided is a display substrate, the display substrate is provided with a display area and a peripheral area around the display area, and includes: a source/drain layer, a planarization layer and an anode layer which are laminated in sequence, wherein in the peripheral area, the source/drain layer includes at least one pair of first signal lines including a signal line of a gate circuit and the anode layer includes a common power line provided with vent holes; and overlapping areas between two first signal lines in any pair of the first signal lines and a projection pattern of the vent hole are equal, the projection pattern of the vent hole being a pattern of an orthographic projection of the vent hole in the common power line onto the source/drain layer. A display panel and a display device are also provided.
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公开(公告)号:US20220343841A1
公开(公告)日:2022-10-27
申请号:US17762330
申请日:2021-04-15
Applicant: BOE Technology Group Co., Ltd.
Inventor: Guangliang SHANG , Libin LIU , Tian DONG , Jiangnan LU , Shiming SHI
IPC: G09G3/3225 , G11C19/28
Abstract: The present disclosure provides a signal generation circuit, a signal generation method, a signal generation module and a display device. The signal generating circuit includes an input terminal, a signal output terminal, a transmission control circuit, a first output circuit, and an output control circuit; the output control circuit is electrically connected to a first output control terminal, a second output control terminal, a second voltage terminal, the signal writing-in terminal, the signal output terminal and the first voltage terminal, configured to control to connect the signal writing-in terminal and the second voltage terminal under the control of a second output control signal provided by the second output control terminal, and control to connect the signal output terminal and the first voltage terminal under the control of a first output control signal provided by the first output control terminal. The present disclosure expands an adjustment range of frequency of a PWM signal.
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公开(公告)号:US20220149138A1
公开(公告)日:2022-05-12
申请号:US17427076
申请日:2020-11-13
Applicant: BOE Technology Group Co., Ltd.
Inventor: Jiangnan LU , Guangliang SHANG , Can ZHENG , Yu FENG , Libin LIU , Jie ZHANG , Mei LI
IPC: H01L27/32
Abstract: An organic light-emitting diode display substrate, a display panel and a display device. The display substrate includes a source/drain layer (101), a planarization layer (102) and an anode layer (103) which are laminated in sequence; the source/drain layer (101) comprises at least one pair of first signal lines (110); the anode layer (103) comprises a common power line (130), and the common power line (130) is provided with an air discharge hole (131); and the overlapping areas of a projection pattern of the air discharge hole (131) and two first signal lines (110) in any pair of first signal lines (110) are equal, the overlapping areas are greater than 0, and the projection pattern of the air discharge hole (131) is a pattern of an orthographic projection, on the source/drain layer (101), of the air discharge hole (131) on the common power line (130). The overlapping areas of the common power line (130) and the two first signal lines (110) in the pair of first signal lines (110) are equal, so that the parasitic capacitances between the common power line (130) and the two first signal lines (110) in the pair of first signal lines (110) are the same in magnitude, and so that signals transmitted by the pair of first signal lines (110) match each other, ensuring the uniformity of a display screen.
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公开(公告)号:US20210356510A1
公开(公告)日:2021-11-18
申请号:US16344634
申请日:2018-08-31
Applicant: BOE TECHNOLOGY GROUP CO., LTD. , BEIHANG UNIVERSITY
Inventor: Jiangnan LU , Hongge LI
IPC: G01R31/26
Abstract: Disclosed are a method and apparatus for determining electrical characteristics of a transistor, and a computer-readable storage medium. The method for determining electrical characteristics of a transistor includes: determining mobility characteristics of carriers in channels of the transistor at a transistor operating temperature condition; and determining electrical characteristics of the transistor based on the mobility characteristics of the carriers, semiconductor material properties of the transistor, and structural features of the transistor.
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公开(公告)号:US20250061835A1
公开(公告)日:2025-02-20
申请号:US18938202
申请日:2024-11-05
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Guangliang SHANG , Jie ZHANG , Jiangnan LU , Mei LI , Libin LIU
IPC: G09G3/20
Abstract: A gate driving unit includes a charge pump circuit and an output circuit; the charge pump circuit is connected to a first input node, an input clock signal terminal and a first node; the charge pump circuit is configured to control a voltage signal of the first input node under the control of an input clock signal provided by the input clock signal terminal, the voltage signal of the first input node is written into the first node when the voltage signal of the first input node is a first voltage signal; the output circuit comprises a first output transistor, a control electrode of the first output transistor is connected to the first node, a first electrode of the first output transistor is connected to an output voltage terminal, and a second electrode of the first output transistor is connected to a gate driving signal output terminal.
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公开(公告)号:US20240212590A1
公开(公告)日:2024-06-27
申请号:US17913894
申请日:2021-10-29
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Jiangnan LU , Shiming SHI , Hui ZHAO , Libin LIU , Yanyan WANG , Weiwei WANG
IPC: G09G3/3208 , H10K59/35
CPC classification number: G09G3/3208 , H10K59/352 , H10K59/353 , G09G2300/0439
Abstract: The present disclosure provides a pixel array and a display apparatus. The pixel array includes a plurality of first sub-pixels having a first color, a plurality of second sub-pixels having a second color, and a plurality of third sub-pixels having a third color; wherein at least a portion of at least one first sub-pixel of the plurality of first sub-pixels includes an inward indentation, at least a portion of at least one second sub-pixel of the plurality of second sub-pixels includes an inward indentation, and at least one of the plurality of third sub-pixels adjacent to the at least one second sub-pixel includes an outward protrusion corresponding to the inward indentation of the at least one second sub-pixel.
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公开(公告)号:US20240144884A1
公开(公告)日:2024-05-02
申请号:US18274958
申请日:2022-07-01
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Jiangnan LU , Libin LIU , Zhenzhen SHAN , Shiming SHI
IPC: G09G3/3258
CPC classification number: G09G3/3258 , G09G2300/0819 , G09G2300/0842 , G09G2310/062 , G09G2310/08
Abstract: Provided are a pixel driving circuit and a display panel. The pixel driving circuit includes: a data writing sub-circuit, a threshold compensation sub-circuit, a driving sub-circuit, a storage sub-circuit, a first reset sub-circuit, a second reset sub-circuit. The driving sub-circuit and the storage sub-circuit are connected at a first node; the data writing sub-circuit and the storage sub-circuit are connected at a second node; the first reset sub-circuit includes a first transistor having a control electrode connected with a first reset signal line, a first electrode connected with a first initialization signal line, and a second electrode connected with the first node; the threshold compensation sub-circuit includes a second transistor having a first electrode connected with the first node, a second electrode connected with the second node, and a control electrode connected with a second scan line; the first transistor and/or the second transistor includes an oxide thin film transistor.
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