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公开(公告)号：US20240078956A1
公开(公告)日：2024-03-07
申请号：US18494796
申请日：2023-10-26
Applicant: BOE TECHNOLOGY GROUP CO., LTD
Inventor： Long HAN , Libin LIU , Lujiang HUANGFU
IPC: G09G3/20 , G09G3/3233
CPC classification number: G09G3/2074 , G09G3/3233 , G09G2300/0408 , G09G2300/0426 , G09G2300/0465 , G09G2300/0819 , G09G2310/0202 , G09G2310/08 , G09G2320/066
Abstract: The present disclosure relates to an array substrate and a display device. The array substrate includes a plurality of pixel units arranged in an array, each of the pixel units including a plurality of sub-pixels. The array substrate includes: a plurality of power lines which are arranged in a conductive layer on a base substrate, are arranged at intervals along a first direction and extend along a second direction, and are used for providing power signals to the sub-pixels; and a plurality of power leads which are arranged in another conductive layer, are arranged at intervals along the second direction and extend along the first direction. Projections of at least one of the power lines and at least one of the power leads on the base substrate intersect, and the projections of the power lines and the power leads on the base substrate form a grid-like structure.
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公开(公告)号：US20230180550A1
公开(公告)日：2023-06-08
申请号：US17630211
申请日：2021-02-04
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Long HAN , Libin LIU , Lujiang HUANGFU
IPC: H10K59/131
CPC classification number: H10K59/131
Abstract: The present disclosure provides an array substrate and a display device. The array substrate includes a plurality of initialization signal lines and a plurality of connection lines. The initialization signal lines are arranged in a first conductive layer, extend along a first direction and are arranged at intervals along a second direction; the connection lines are arranged in a second conductive layer, extend along the second direction and are arranged at intervals along the first direction; the first conductive layer and the second conductive layer are an identical layer or different layers; projections of at least one of the initialization signal lines and at least one of the connection lines on the base substrate are intersected and electrically connected, such that the projections of the initialization signal lines and the connection lines on the base substrate form a grid structure.
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公开(公告)号：US20230178017A1
公开(公告)日：2023-06-08
申请号：US17615950
申请日：2020-12-28
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
IPC: G09G3/3233 , H10K59/121
CPC classification number: G09G3/3233 , H10K59/121 , G09G2320/0214 , G09G2330/02 , H10K2102/302
Abstract: Disclosed are a display panel and a display device. The display panel includes: a pixel unit, including a pixel circuit and a light-emitting element, the pixel circuit includes a driving transistor and a threshold compensation transistor; a first power line configured to supply a first power supply voltage to the pixel circuit; a blocker, electrically connected with the first power line; and a first conductive structure, connected with the gate electrode of the driving transistor, the first channel and the second channel of the threshold compensation transistor are connected by a conductive connection portion; an area of an orthographic projection of a portion of the blocker overlapping with the first conductive structure on the base substrate is larger than an area of an orthographic projection of a portion of the blocker overlapping with the conductive connection portion on the base substrate.
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公开(公告)号：US20230088068A1
公开(公告)日：2023-03-23
申请号：US17908017
申请日：2021-05-21
Applicant: BOE Technology Group Co., Ltd.
Inventor： Long HAN , Pinfan WANG , Fangxu CAO , Wenqiang LI , Libin LIU
IPC: H10K59/35 , H10K59/121 , H10K59/126 , H10K50/84
Abstract: A display panel includes an array substrate and an encapsulation layer encapsulated on a surface of the array substrate. The display panel further includes a stretching area located in a corner area of the display panel and at least partially located in a display area of the display panel, and the stretching area is provided with a hollow opening penetrating through the array substrate and the encapsulation layer.
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公开(公告)号：US20230004190A1
公开(公告)日：2023-01-05
申请号：US17782770
申请日：2021-04-21
Applicant: BOE Technology Group Co., Ltd.
Inventor： Yuhan QIAN , Libin LIU , Long HAN
IPC: G06F1/16
Abstract: A display substrate, a manufacturing method thereof, and a display device are provided. The display substrate includes: a non-stretchable display region and a stretchable display region. The stretchable display region includes multiple island regions in an array and separated from each other, and multiple bridge regions connecting adjacent island regions, a pixel unit is arranged on each of the island regions, the pixel unit includes at least one pixel, and a signal wire electrically connecting the pixels is arranged on each bridge region. A pixel pitch between the pixels in the pixel unit in a stretching direction is a reference pitch P0, a pitch between two adjacent pixel units in the stretching direction is a first pitch P1, and the first pitch P1 is less than the reference pitch P0.
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Patent Agency Ranking
公开(公告)号：US20220351666A1
公开(公告)日：2022-11-03
申请号：US17594771
申请日：2020-10-30
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Tian DONG , Can ZHENG , Li WANG , Long HAN , Yu FENG , Hao ZHANG , Jiangnan LU , Jie ZHANG , Bo WANG , Jingquan WANG
IPC: G09G3/20
Abstract: The display panel includes a plurality of rows and a plurality of columns of pixel circuits, a plurality of rows of gate lines, a plurality rows of reset control lines, and a plurality of columns of data lines, a same row of pixel circuits corresponds to two rows of gate lines, and one/the other row of gate line is electrically connected to odd/even-numbered columns of pixel circuits in the row of pixel circuits, and provides a corresponding gate driving signal for the odd/even-numbered columns of pixel circuits; a same column of pixel circuits corresponds to two columns of data lines, and one/the other column of data line of the two columns of data lines is electrically connected to odd/even-numbered rows of pixel circuits, and provides a corresponding data voltage for the odd/even-numbered rows of pixel circuits.
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公开(公告)号：US20240072074A1
公开(公告)日：2024-02-29
申请号：US17627768
申请日：2021-03-09
Inventor： Wenqiang LI , Long HAN , SHI Ling , Ke LIU , Xuewei TIAN , Kuo SUN , Pinfan WANG
IPC: H01L27/12
CPC classification number: H01L27/1255 , H01L27/124
Abstract: Please replace the abstract originally filed with the following: A display panel and a display device. Because the pixel distribution density in a second display subarea (A12) is lower than that in a first display subarea (A11), the quantities of sub-pixels (pix) connected to scanning lines are not completely the same; a sub-pixel row having the greatest quantity of sub-pixels (pix) in the display panel is taken as a reference sub-pixel row, the quantity of the sub-pixels (pix) of the reference sub-pixel row is taken as a reference value, a sub-pixel row having the quantity of sub-pixels (pix) smaller than the reference value is taken as a compensation sub-pixel row, and a scanning line connected to the compensation sub-pixel row is taken as a first scanning line; the display panel is provided with load compensation units corresponding to at least part of the first scanning lines, and the load compensation units are located in the second display subarea.
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公开(公告)号：US20240049542A1
公开(公告)日：2024-02-08
申请号：US17619292
申请日：2021-02-08
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Long HAN
IPC: H10K59/131 , H10K59/12
CPC classification number: H10K59/1315 , H10K59/1201
Abstract: A display substrate includes a base, and first data lines, second data lines, a plurality of sub-pixels and voltage signal lines disposed on the base. The first data lines and the second data lines are alternately arranged in a first direction. Each column of sub-pixels includes first sub-pixels and second sub-pixels that are alternately arranged in a second direction. In the column of sub-pixels, the first sub-pixels are electrically connected to a first data line located on a side of the column of sub-pixels and adjacent thereto, and the second sub-pixels are electrically connected to a second data line located on another side of the column of sub-pixels and adjacent thereto. An orthogonal projection of each voltage signal line on the base is located between orthogonal projections of a first data line and a second data line between two adjacent columns of sub-pixels on the base.
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公开(公告)号：US20240046880A1
公开(公告)日：2024-02-08
申请号：US17763182
申请日：2021-04-01
Applicant: BOE Technology Group Co., Ltd.
IPC: G09G3/3258 , G09G3/3233 , G09G3/3266
CPC classification number: G09G3/3258 , G09G3/3233 , G09G3/3266 , G09G2300/0819 , G09G2300/0842
Abstract: The present disclosure relates to a pixel drive circuit, a driving method thereof, and a display panel, which relates to the field of display technology. The source, drain and gate of the drive transistor of the pixel drive circuit are respectively connected to the first node, the second node and the third node. The storage capacitor is connected to the third node. The first control unit is used for enabling a path between the second node and the fourth node in response to the first control signal. The second control unit is used for outputting the first power supply voltage to the first node in response to the light-emitting signal. The threshold compensation transistor is used for enabling a path between the second node and the third node in response to the second control signal. The material of the active region is a metal oxide semiconductor.
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公开(公告)号：US20230169900A1
公开(公告)日：2023-06-01
申请号：US17615489
申请日：2021-02-03
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Long HAN , Pinfan WANG , Fangxu CAO , Wenqiang LI , Libin LIU
IPC: G09G3/00 , G09G3/3266 , G09G3/3233 , H10K59/131
CPC classification number: G09G3/035 , G09G3/3233 , G09G3/3266 , H10K59/131 , G09G2300/0408 , G09G2300/0426 , G09G2300/0439 , G09G2300/0819 , G09G2300/0842 , G09G2300/0861 , G09G2310/0286 , G09G2320/0233
Abstract: A display substrate and a display device are disclosed. The display substrate includes: a a transition region, located between a first display region and a second display region, the first display region, the second display region and the transition region are provided with a plurality of pixels, the plurality of pixels are arranged in an array in the first direction and a second direction intersecting with the first direction, a pixel per inch (PPI) of the first display region is greater than a PPI of the second display region and a PPI of the transition region, the transition region is further provided with a row driving circuit, the row driving circuit is configured to drive the plurality of pixels in the first display region, the second display region and the transition region by rows.
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