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    DISPLAY PANEL, METHOD OF DRIVING THE SAME AND DISPLAY DEVICE
    2.
    发明申请
    DISPLAY PANEL, METHOD OF DRIVING THE SAME AND DISPLAY DEVICE 有权

    公开(公告)号：US20210166645A1

    公开(公告)日：2021-06-03

    申请号：US17041357

    申请日：2020-04-16

    Applicant: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD. ,  BOE TECHNOLOGY GROUP CO., LTD.

    Inventor： Lei LI ,  Jun FAN ,  Le TA ,  Yusheng LIU ,  Yongqiang ZHANG ,  Mei LI ,  Yafei LI ,  Peng LIU ,  Zhixuan GUO

    IPC: G09G3/36 ,  H01L27/12

    Abstract: The present disclosure provides a display panel, a method of driving the display panel and a display device. Each signal input sub-circuitry of the display panel includes at least two transistors. A same control signal is applied to control signal lines corresponding to a same signal input sub-circuitry, different control signals are applied to control signal lines corresponding to different signal input sub-circuitries, and time periods within which the different control signals are at active levels are staggered from each other. A sum of width-to-length ratios of channels of the at least two transistors is equal to a first predetermined value, and an overlapping area of the gate electrode of each of the at least two transistors relative to an active layer of the transistor is smaller than a second predetermined value in a direction perpendicular to a base substrate of the display panel.

    Display Substrate, Preparation Method Therefor, and Display Apparatus
    3.
    发明公开
    Display Substrate, Preparation Method Therefor, and Display Apparatus 审中-公开

    公开(公告)号：US20230380227A1

    公开(公告)日：2023-11-23

    申请号：US17630172

    申请日：2021-03-22

    Applicant: BOE Technology Group Co., Ltd.

    Inventor： Mei LI ,  Libin LIU

    IPC: H10K59/131 ,  H10K59/121 ,  H10K59/12

    CPC classification number: H10K59/131 ,  H10K59/1213 ,  H10K59/1201

    Abstract: A display substrate, a preparation method therefor, and a display apparatus are provided. In a plane parallel to the display substrate, the display substrate includes multiple sub-pixels. At least one sub-pixel includes a pixel driving circuit at least including a drive transistor. An active layer of the drive transistor includes a channel region which includes a drain terminal segment extending in a first direction, an intermediate segment connected to the drain terminal segment, and a source terminal segment connected to the intermediate segment. A first end of the drain terminal away from the intermediate segment has a first width, a second end of the drain terminal segment close to the intermediate segment has a second width. The first width is greater than the second width. The first and second widths are dimensions of the drain terminal segment in a second direction. The first direction intersects with the second direction.

    GATE DRIVING CIRCUIT, DISPLAY SUBSTRATE, DISPLAY DEVICE AND GATE DRIVING METHOD
    5.
    发明申请
    GATE DRIVING CIRCUIT, DISPLAY SUBSTRATE, DISPLAY DEVICE AND GATE DRIVING METHOD 有权

    公开(公告)号：US20220343855A1

    公开(公告)日：2022-10-27

    申请号：US17433668

    申请日：2021-02-24

    Applicant: BOE TECHNOLOGY GROUP CO., LTD.

    Inventor： Guangliang SHANG ,  Tian DONG ,  Xinshe YIN ,  Mei LI ,  Libin LIU ,  Shiming SHI

    IPC: G09G3/3266 ,  G11C19/28

    Abstract: Provided are a gate driving circuit, a display substrate, a display device and a gate driving method, the gate driving circuit includes: a frequency doubling control circuit and an effective output circuit including first shift registers, the first shift register at the first stage has a first signal input terminal coupled with an output control signal line and a second signal input terminal coupled with the frequency doubling control circuit; the frequency doubling control circuit is coupled to the output control signal line, for providing a frequency doubling control signal thereto after a preset time period from the receipt of the output control signal in response to an output control signal from the output control signal line; the first shift register at the first stage outputs a scanning signal in response to the output control signal and a scanning signal in response to the frequency doubling control signal.

    DISPLAY SUBSTRATE, MANUFACTURING METHOD THEREOF AND DISPLAY DEVICE
    6.
    发明申请
    DISPLAY SUBSTRATE, MANUFACTURING METHOD THEREOF AND DISPLAY DEVICE 有权

    公开(公告)号：US20220181419A1

    公开(公告)日：2022-06-09

    申请号：US17599007

    申请日：2021-02-25

    Applicant: BOE TECHNOLOGY GROUP CO., LTD.

    Inventor： Yuhan QIAN ,  Libin LIU ,  Jiangnan LU ,  Mei LI ,  Shiming SHI ,  Jie ZHANG

    IPC: H01L27/32 ,  H01L51/56 ,  H01L51/50

    Abstract: A display substrate includes: a base substrate; a light-emitting unit in each pixel region and including a first electrode, an organic light-emitting layer, and a second electrode sequentially disposed in a direction away from the base substrate; an auxiliary conductive layer between the light-emitting unit and the base substrate; a pixel circuit in each pixel region and including a driving transistor. The auxiliary conductive layer is on a side of the pixel circuit away from the base substrate, the second electrode has a portion extending out of the pixel region and coupling to the auxiliary conductive layer through a via hole not overlapping the pixel region, the auxiliary conductive layer is insulated and spaced apart from the first electrode and has a mesh or chain shape, and a material of the auxiliary conductive layer is the same as a material of the first and second electrodes of the driving transistor.

    ARRAY SUBSTRATE AND DISPLAY DEVICE
    9.
    发明公开
    ARRAY SUBSTRATE AND DISPLAY DEVICE 审中-公开

    公开(公告)号：US20240179985A1

    公开(公告)日：2024-05-30

    申请号：US17773595

    申请日：2021-04-01

    Applicant: BOE Technology Group Co., Ltd.

    Inventor： Mei LI ,  Libin LIU

    IPC: H10K59/131

    CPC classification number: H10K59/1315

    Abstract: The present disclosure is related to an array substrate and a display device. The array substrate has a display area and a peripheral area surrounding the display area. The array substrate includes a gate material layer and a source and drain material layer that are sequentially stacked on a base substrate. The array substrate further includes a driving signal line. The driving signal line includes a first sub-signal line and a second sub-signal line. The first sub-signal line is arranged in the gate material layer and extends from the peripheral area to the display area. The second sub-signal line is arranged in the source and drain material layer and located at least in the display area. The first sub-signal line and the second sub-signal line are electrically connected through a via hole.

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