公开(公告)号：US12254841B2

公开(公告)日：2025-03-18

申请号：US18274470

申请日：2021-12-20

Applicant: BOE Technology Group Co., Ltd.

Inventor： Haoliang Zheng ,  Yan Qu ,  Dongni Liu ,  Li Xiao ,  Jiao Zhao ,  Xiaorong Cui ,  Seungwoo Han ,  Minghua Xuan

IPC: G09G3/3275 ,  G09G3/3266

Abstract: A display substrate a driving method therefor, and a display apparatus. The display substrate comprises: M rows and N columns of sub-pixels, N data signal lines and a data reset circuit, wherein at least one sub-pixel comprises a pixel circuit; an ith data signal line is connected to pixel circuits in an ith column, where M≥1, N≥1, and 1≤i≤N; and the data reset circuit is electrically connected to a data reset control end, a data initial signal end and the N data signal lines, and is configured to provide a signal of the data initial signal end to the N data signal lines under the control of the data reset control end.

公开(公告)号：US20250076725A1

公开(公告)日：2025-03-06

申请号：US18690813

申请日：2023-08-31

Applicant: Beijing BOE Technology Development Co., Ltd. ,  BOE Technology Group Co., Ltd.

Inventor： Xiaorong Cui ,  Yuzhen Guo ,  Haoliang Zheng ,  Li Xiao ,  Chenyang Zhang ,  Minghua Xuan ,  Lipeng Gao ,  Jiao Zhao

IPC: G02F1/1685 ,  G02F1/167 ,  G02F1/1675

Abstract: A simulation method is provided, including: obtaining a model parameter information, including a total charge quantity and respective charge volume densities of various charged particles, and an external electric field force; calculating a built-in electric field intensity by using the model parameter information and a pre-constructed model, where an input of the model includes the total charge quantity and the respective charge volume densities of the various charged particles; calculating, based on the built-in electric field intensity, a built-in electric field force acting on each charged particle; simulating a motion of each charged particle according to the external electric field force and the built-in electric field force acting on each charged particle; and determining a display grayscale under the external electric field force to obtain a simulation relationship between display grayscale and external electric field force, in response to the motion of each charged particle stopping.

公开(公告)号：US12198608B2

公开(公告)日：2025-01-14

申请号：US18005373

申请日：2021-11-24

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Li Xiao ,  Seungwoo Han ,  Dongni Liu ,  Haoliang Zheng ,  Minghua Xuan ,  Jiao Zhao ,  Liang Chen ,  Xiaorong Cui

IPC: G09G3/32

Abstract: A display substrate includes a plurality of data lines extending in a first direction, and a plurality of sub-pixels. A sub-pixel includes a pixel driving circuit and a light-emitting device. The pixel driving circuit includes a current control circuit, and a duration control circuit electrically connected to the current control circuit and the light-emitting device. The current control circuit is configured to generate a driving signal to drive the light-emitting device to emit light; and the duration control circuit is configured to generate a duration control signal to control a duration of a connection between the current control circuit and the light-emitting device. The current control circuit and the duration control circuit are electrically connected to a same data line.

公开(公告)号：US12125428B2

公开(公告)日：2024-10-22

申请号：US17923690

申请日：2021-11-29

Applicant: BOE Technology Group Co., Ltd.

Inventor： Seungwoo Han ,  Haoliang Zheng ,  Dongni Liu ,  Li Xiao ,  Jiao Zhao ,  Xiaorong Cui ,  Minghua Xuan

IPC: G09G3/32 ,  G11C19/28

CPC classification number: G09G3/32 ,  G11C19/28 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2310/0286 ,  G09G2310/08

Abstract: A shift register includes: an input circuit configured to receive an input signal; a first control circuit configured to control, in response to a second clock signal and a voltage at a second node, a voltage at the first node; a second control circuit configured to control, in response to a first clock signal, the second clock signal, and the voltage at the first node, a voltage at the second node, and control, in response to the second clock signal and the voltage at the first node, a voltage at the fifth node; and an output circuit configured to transmit, in response to an active level at the first node, a second power signal to an output signal terminal, and transmit, in response to an active level at the fifth node, the first power signal to the output signal terminal. All transistors included in the shift register are N-type transistors.