公开(公告)号：US20160013281A1

公开(公告)日：2016-01-14

申请号：US14435610

申请日：2014-09-18

申请人： BOE TECHNOLOGY GROUP CO., LTD. ,  BEIJING BOE DISPLAY TECHNOLOGY CO., LTD.

发明人： Kiyong KIM ,  Liping LUO ,  Chaoqin XU ,  Jeong Hun RHEE

IPC分类号： H01L29/417 ,  G02F1/1362 ,  H01L27/12

CPC分类号： H01L29/41733 ,  G02F1/136259 ,  H01L27/124 ,  H01L27/1259

摘要： Embodiments of the present disclosure disclose a thin film transistor, a fabrication method thereof, a repair method thereof, and an array substrate. The thin film transistor comprises a gate electrode (12), a gate insulating layer (13), an active layer (14), a source electrode (16) and a drain electrode (17). The source electrode (16) comprises a first source electrode portion (161) and a second source electrode portion (162) independent from each other, the first source electrode portion (161) and the second source electrode portion (162) are electrically connected with the active layer (14), respectively; and/or, the drain electrode (17) comprises a first drain electrode portion (171) and a second drain electrode portion (172) independent from each other, the first drain electrode portion (171) and the second drain electrode portion (172) are electrically connected with the active layer (14), respectively.

摘要翻译： 本公开的实施例公开了薄膜晶体管，其制造方法，其修复方法和阵列基板。 薄膜晶体管包括栅电极（12），栅极绝缘层（13），有源层（14），源电极（16）和漏电极（17）。 源极（16）包括彼此独立的第一源电极部分（161）和第二源电极部分（162），第一源电极部分（161）和第二源电极部分（162）与 活性层（14）; 和/或所述漏电极（17）包括彼此独立的第一漏电极部分（171）和第二漏电极部分（172），所述第一漏电极部分（171）和所述第二漏电极部分（172） 分别与有源层（14）电连接。

公开(公告)号：US20170278940A1

公开(公告)日：2017-09-28

申请号：US15504936

申请日：2016-03-25

申请人： BOE TECHNOLOGY GROUP CO., LTD. ,  BEIJING BOE DISPLAY TECHNOLOGY CO., LTD.

发明人： Liping LUO ,  Huishuang LIU ,  Haichen HU ,  Zengbiao SUN ,  Tao WANG ,  Kiyong KIM

IPC分类号： H01L29/49 ,  H01L27/12 ,  H01L29/45

CPC分类号： H01L29/4908 ,  G03F1/32 ,  H01L27/1214 ,  H01L27/1262 ,  H01L27/127 ,  H01L29/458

摘要： A mask, including a transparent substrate and mask patterns formed on a surface of the transparent substrate, wherein the mask patterns include a first area for forming film patterns in a display area and a second area for forming film patterns in a non-display area; both the first area and the second area are provided with a plurality of patterned sub-masks; a distribution density of the patterned sub-masks in the first area is less than a distribution density of the patterned sub-masks in the second area; each patterned sub-mask includes a first pattern for forming a source electrode of a transistor, a second pattern for forming a drain electrode of the transistor, and a slit interposed between the first pattern and the second pattern; and a width of the slit in the first area is greater than a width of the slit in the second area.

公开(公告)号：US20170199413A1

公开(公告)日：2017-07-13

申请号：US15324405

申请日：2016-03-25

申请人： BOE TECHNOLOGY GROUP CO., LTD. ,  BEIJING BOE DISPLAY TECHNOLOGY CO., LTD.

发明人： Zengbiao SUN ,  Kiyong KIM ,  Tao WANG ,  Liping LUO ,  Huishuang LIU ,  Huali YAO

IPC分类号： G02F1/1345 ,  G02F1/1343 ,  G09G3/36 ,  G02F1/1368

摘要： The present application provides an array substrate and a method for manufacturing the same, and a display device including the array substrate, the array substrate includes a substrate, and a gate drive circuit and a common electrode line arranged above the substrate, the gate drive circuit and the common electrode line are arranged adjacent to each other, and at least one groove is provided in the common electrode line. In the application, by forming the groove in the common electrode line, flow of the developing solution from the common electrode line to the gate drive circuit can be effectively suppressed, so as to solve the problem that the channel is broken in the thin film transistor of the gate drive circuit due to nonuniform distribution of the developing solution.