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公开(公告)号：US11187949B2
公开(公告)日：2021-11-30
申请号：US16611583
申请日：2018-11-22
发明人： Zhengdong Zhang , Lei Su , Xiaofei Yang , Mingzhou Guo , Xu Liu
IPC分类号： G02F1/1362 , G02F1/1343 , G02F1/1368 , H01L27/12 , G02F1/1335 , H01L29/40 , H01L29/417
摘要： There is provided an array substrate, a manufacturing method therefor, a display panel, and a display device. The array substrate includes: a base substrate, and a gate metal pattern, a gate insulating layer and a source-drain metal pattern which are sequentially disposed on the base substrate. The gate metal pattern includes a signal line and a gate electrode, the signal line is in the peripheral area, the gate insulating layer is provided with a first via hole penetrating the gate insulating layer, the orthogonal projection of the first via hole on the base substrate and the orthogonal projection of the signal line on the base substrate have an overlapping area, the source-drain metal pattern includes a source-drain electrode wire, and the source-drain electrode wire is electrically connected to the signal line through the first via hole. The present disclosure achieves the function of protecting the signal line.
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公开(公告)号：US20190204681A1
公开(公告)日：2019-07-04
申请号：US16054281
申请日：2018-08-03
发明人： Gang Zhou , Xiaofei Yang
IPC分类号： G02F1/1335 , G02F1/1333 , G02F1/133
CPC分类号： G02F1/133602 , G02F1/13306 , G02F1/133345 , G02F1/133512 , G02F2201/121 , G02F2201/123
摘要： The present disclosure provides an electronic paper, a display method thereof and a display device. The electronic paper of the present disclosure includes an upper substrate, a lower substrate, a pixel electrode, a common electrode, and charged particles. The upper substrate and the lower substrate are disposed opposite to each other. The electronic paper further includes a backlight source disposed at a side of the lower substrate far away from the upper substrate. The pixel electrode is disposed at a side of the upper substrate close to the lower substrate. The common electrode is perpendicular to the lower substrate and is disposed between the upper substrate and the lower substrate.
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公开(公告)号：US20220373845A1
公开(公告)日：2022-11-24
申请号：US17772531
申请日：2021-03-09
发明人： Zhengdong Zhang , Xiaofei Yang , Lei Su , Limiao Wang , Hongjun Wang , Jia Meng , Xiaoxu Hu
IPC分类号： G02F1/1362
摘要： Provided is an array substrate. The array substrate includes a plurality of sub-pixels; wherein a storage capacitor and an extended storage capacitor are disposed in each of the plurality of sub-pixels, the extended storage capacitor and the storage capacitor being connected in parallel; and the array substrate includes a gate electrode layer, a source and drain electrode layer, and a pixel electrode.
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公开(公告)号：US10797087B2
公开(公告)日：2020-10-06
申请号：US16327697
申请日：2018-06-14
发明人： Zhengdong Zhang , Gang Zhou , Hua Tian , Xiaofei Yang , Ke Dai , Lei Su , Xun Mou
IPC分类号： H01L27/12 , H01L29/786 , G02F1/1335 , G02F1/1362
摘要： An array substrate, a method for manufacturing an array substrate and a display device are provided. The array substrate includes: a base substrate, and an insulating layer, a gate line, a source electrode, a drain electrode, and a data line on the base substrate. The insulating layer includes a light transmission portion and a light shielding portion, and orthographic projections of the gate line, the source electrode, the drain electrode, and the data line on the base substrate are all within an orthographic projection of the light shielding portion on the base substrate.
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公开(公告)号：US10483219B2
公开(公告)日：2019-11-19
申请号：US15502132
申请日：2016-08-12
发明人： Xiaofei Yang , Zailong Mo , Yanxia Xin , Ke Dai , Yawen Zhu , Lei Su
摘要： An array substrate includes a metal pattern and an electrically conductive pattern formed sequentially on a base substrate. The electrically conductive pattern is insulated from the metal pattern; and a static charge releasing pattern is formed in a same layer as the electrically conductive pattern and formed by a same material as the electrically conductive pattern, the static charge releasing pattern being insulated from the electrically conductive pattern and electrically connected with the metal pattern.
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公开(公告)号：US10025143B2
公开(公告)日：2018-07-17
申请号：US15110230
申请日：2015-11-13
发明人： Xiaofei Yang , Yuqing Yang , Yanxia Xin , Zailong Mo , Xue Jiang , Xun Mou
IPC分类号： G02F1/1339 , G02F1/1343 , G02F1/1362 , G02F1/1333 , G02F1/1368
摘要： An array substrate and a fabrication method thereof and a display device are provided. The array substrate comprises: a base substrate; a plurality of gate lines and a plurality of data lines formed on the base substrate, the plurality of gate lines and the plurality of data lines intersecting with each other to define a plurality of sub-pixels, each of the sub-pixels including a thin film transistor and a pixel electrode, and the plurality of sub-pixels including a first sub-pixel; a passivation layer formed on the base substrate and covering the gate lines, the data lines and the thin film transistor, a via hole being provided in the passivation layer and the pixel electrode being formed on the passivation layer and connected with a drain electrode or a source electrode of the thin film transistor through the via hole in each of the sub-pixels; and a first spacer, provided in the via hole of the first sub-pixel.
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公开(公告)号：US11988927B2
公开(公告)日：2024-05-21
申请号：US17772531
申请日：2021-03-09
发明人： Zhengdong Zhang , Xiaofei Yang , Lei Su , Limiao Wang , Hongjun Wang , Jia Meng , Xiaoxu Hu
IPC分类号： G02F1/1362 , G02F1/1343
CPC分类号： G02F1/136213 , G02F1/136209 , G02F1/136286 , G02F1/134309
摘要： Provided is an array substrate. The array substrate includes a plurality of sub-pixels; wherein a storage capacitor and an extended storage capacitor are disposed in each of the plurality of sub-pixels, the extended storage capacitor and the storage capacitor being connected in parallel; and the array substrate includes a gate electrode layer, a source and drain electrode layer, and a pixel electrode.
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公开(公告)号：US11233016B2
公开(公告)日：2022-01-25
申请号：US16601351
申请日：2019-10-14
发明人： Xiaofei Yang , Zailong Mo , Yanxia Xin , Ke Dai , Yawen Zhu , Lei Su
摘要： An array substrate and a method for producing the same are disclosed. The array substrate includes a metal pattern and an electrically conductive pattern sequentially formed on a base substrate, the electrically conductive pattern being insulated from the metal pattern. The array substrate further includes a static charge releasing pattern formed in a same layer and made of a same material as the electrically conductive pattern, and which is insulated from the electrically conductive pattern. The metal pattern is a signal line running through a display area of the array substrate, and includes an input end, an output end, and a body portion between the input end and the output end. The output end of the signal line includes an island-like structure, and a width of the island-like structure is greater than that of the body portion. The static charge releasing pattern is electrically connected with the island-like structure.
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9.发明授权公开(公告)号：US10353231B2
公开(公告)日：2019-07-16
申请号：US15674441
申请日：2017-08-10
发明人： Gang Zhou , Hua Tian , Jianbiao Zhang , Xiaofei Yang
IPC分类号： G06F3/041 , G06F3/044 , G02F1/1333 , G02F1/1335 , G02F1/1341 , G02F1/1343 , G02F1/1345
摘要： A touch display device, a touch display panel and a method for manufacturing the touch display panel are provided. The touch display panel includes a first substrate, a second substrate and a liquid crystal layer. The first substrate includes a first base, a touch electrode layer and a color filter layer. The touch electrode layer is arranged at any side of the first base, and the first base is divided into an electrode region and a wiring region. A light transmittance of the color filter layer and a light transmittance of the touch electrode layer are capable of compensating for each other, so that a difference between a light transmittance of the first substrate at the electrode region and a light transmittance of the first substrate at the wiring region is smaller than a threshold.
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10.发明申请公开(公告)号：US20190131316A1
公开(公告)日：2019-05-02
申请号：US15935213
申请日：2018-03-26
发明人： Lei Su , Xiaofei Yang , Xu Liu , Xun Mou , Yawen Zhu
IPC分类号： H01L27/12 , H01L21/768 , H01L21/3213 , H01L21/311 , H01L23/522
摘要： The present disclosure relates to a via-hole connection structure and a method of manufacturing the same and an array substrate and a method of manufacturing the same. In an embodiment, a method of manufacturing a via-hole connection structure, includes the following steps of: forming a first conductive layer on a substrate, and patterning the first conductive layer to form a first conductive pattern on which a first photoresist pattern is provided; forming a first insulation layer covering the first conductive layer and the first photoresist pattern; patterning the first insulation layer to form a first via-hole from which at least a portion of the first photoresist pattern is exposed; removing the at least a portion of the first photoresist pattern exposed from the first via-hole; and forming a second conductive pattern, wherein the second conductive pattern is electrically connected to the first conductive pattern through the first via-hole.
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