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公开(公告)号：US12223893B2
公开(公告)日：2025-02-11
申请号：US17764993
申请日：2021-05-28
Applicant: BOE Technology Group Co., Ltd.
Inventor： Can Zheng , Li Wang , Long Han , Jianchao Zhu , Libin Liu
IPC: G09G3/32 , G09G3/3233 , H10K59/12 , H10K59/121 , H10K59/131 , H10K59/35 , H10K71/00
Abstract: Disclosed are a display substrate and a preparation method thereof, and a display apparatus. The display substrate includes a substrate and a plurality of sub-pixels, at least one sub-pixel includes a pixel drive circuit and a light emitting device connected to the pixel drive circuit, the pixel drive circuit includes a plurality of transistors, wherein at least one transistor includes an active layer and two gate electrodes. The substrate is provided with a semiconductor layer and a plurality of conductive layers disposed on one side of the semiconductor layer away from the substrate, at least one conductive layer is provided with at least one electrode plate, and there is an overlapping region between an orthographic projection of the electrode plate on the substrate and an orthographic projection of the active layer between the two gate electrodes on the substrate.
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公开(公告)号：US12198599B2
公开(公告)日：2025-01-14
申请号：US18494796
申请日：2023-10-26
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Long Han , Libin Liu , Lujiang Huangfu
IPC: G09G3/20 , G09G3/3233
Abstract: The present disclosure relates to an array substrate and a display device. The array substrate includes a plurality of pixel units arranged in an array, each of the pixel units including a plurality of sub-pixels. The array substrate includes: a plurality of power lines which are arranged in a conductive layer on a base substrate, are arranged at intervals along a first direction and extend along a second direction, and are used for providing power signals to the sub-pixels; and a plurality of power leads which are arranged in another conductive layer, are arranged at intervals along the second direction and extend along the first direction. Projections of at least one of the power lines and at least one of the power leads on the base substrate intersect, and the projections of the power lines and the power leads on the base substrate form a grid-like structure.
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公开(公告)号：US12008943B2
公开(公告)日：2024-06-11
申请号：US17594771
申请日：2020-10-30
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Tian Dong , Can Zheng , Li Wang , Long Han , Yu Feng , Hao Zhang , Jiangnan Lu , Jie Zhang , Bo Wang , Jingquan Wang
IPC: G09G3/20
CPC classification number: G09G3/2092 , G09G2310/0297 , G09G2310/061
Abstract: The display panel includes a plurality of rows and a plurality of columns of pixel circuits, a plurality of rows of gate lines, a plurality rows of reset control lines, and a plurality of columns of data lines, a same row of pixel circuits corresponds to two rows of gate lines, and one/the other row of gate line is electrically connected to odd/even-numbered columns of pixel circuits in the row of pixel circuits, and provides a corresponding gate driving signal for the odd/even-numbered columns of pixel circuits; a same column of pixel circuits corresponds to two columns of data lines, and one/the other column of data line of the two columns of data lines is electrically connected to odd/even-numbered rows of pixel circuits, and provides a corresponding data voltage for the odd/even-numbered rows of pixel circuits.
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4.发明申请公开(公告)号：US20180144811A1
公开(公告)日：2018-05-24
申请号：US15574465
申请日：2017-04-19
IPC: G11C19/28 , G09G3/296 , G09G3/3233
CPC classification number: G11C19/287 , G09G3/20 , G09G3/296 , G09G3/3233 , G09G2310/0267 , G09G2310/0286 , G11C19/28
Abstract: Embodiments of the present disclosure provide a shift register unit, a gate driving circuit and driving method thereof, and a display apparatus. The shift register unit comprises a first controlling sub-circuit, a second controlling sub-circuit, a first pulling up sub-circuit, a second pulling up sub-circuit, a first pulling down sub-circuit and a second pulling down sub-circuit. The first controlling sub-circuit controls the potential at the first node. The voltage of a second clock signal terminal can be outputted to the first and the second outputting terminals by the first and the second pulling down sub-circuits, respectively. The first node, the first clock signal terminal and the second voltage terminal may control the potential at a second node through the second controlling sub-circuit. Under the control of the potential at the second node, the voltage of the second voltage terminal can be outputted to the first and the second outputting terminals.
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公开(公告)号：US20240161669A1
公开(公告)日：2024-05-16
申请号：US17781988
申请日：2021-03-24
Applicant: BOE Technology Group Co., Ltd.
Inventor： Jiangnan Lu , Guangliang Shang , Libin Liu , Long Han , Yu Feng
CPC classification number: G09G3/20 , G11C19/28 , G09G2300/0408 , G09G2310/0286 , G09G2320/0209 , G09G2320/0233 , G09G2330/021
Abstract: A display substrate and a display device are provided. The display substrate includes a shift register unit, a first clock signal line and a first power line, the shift register unit includes a charge pump circuit, and the charge pump circuit includes a first capacitor, a first transistor and a second capacitor. The charge pump circuit is electrically connected with a first input node and a first node, respectively. A first electrode plate of the first capacitor is connected with the first clock signal line, a second electrode plate of the first capacitor is connected with the first input node, a first electrode plate of the second capacitor is connected with the first power line, a second electrode plate of the second capacitor is connected with the first node, a gate electrode of the first transistor is connected with a first electrode or a second electrode of the first transistor.
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Patent Agency Ranking
公开(公告)号：US11751442B2
公开(公告)日：2023-09-05
申请号：US16624286
申请日：2019-04-19
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Hongwei Tian , Yanan Niu , Zheng Liu , Liangjian Li , Dong Li , Meng Zhao , Long Han , Can Zheng
IPC: H10K59/131 , G09G3/3266 , G09G3/3275 , H10K59/124 , H10K59/121 , H10K77/10 , H01L27/12 , H10K59/12 , H10K102/00
CPC classification number: H10K59/131 , G09G3/3266 , G09G3/3275 , H10K59/124 , H10K59/1213 , H10K77/111 , H01L27/124 , H01L27/1218 , H01L27/1248 , H01L27/1288 , H10K59/1201 , H10K2102/311
Abstract: A display panel and a display device are provided. The display panel has a display area. The display panel includes: a base substrate; a driving circuit and at least one signal line on the base substrate; and at least one insulating layer between the driving circuit and the at least one signal line. The driving circuit is disposed in a periphery of the display area; and an orthogonal projection of at least one of the signal lines on the base substrate has an overlapping area with an orthogonal projection of the driving circuit on the base substrate.
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公开(公告)号：US11957040B2
公开(公告)日：2024-04-09
申请号：US17420115
申请日：2020-12-29
Applicant: BOE Technology Group Co., Ltd.
Inventor： Long Han
IPC: H10K77/10 , H10K59/131 , H10K59/35 , H10K102/00
CPC classification number: H10K77/111 , H10K59/131 , H10K59/353 , H10K2102/311
Abstract: The present disclosure relates to a display panel and a curved display device. The display panel includes a flexible substrate (100), including a first region (BB) and a second region (AA). The first region (BB) includes: a plurality of light emitting structures (110) with a first opening gap (200) formed between two adjacent light omitting structures (110); and a plurality of flexible bridging parts (120), with at least one flexible bridging part (120) connecting two adjacent light emitting structures (110).
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公开(公告)号：US11482585B2
公开(公告)日：2022-10-25
申请号：US16767175
申请日：2019-12-17
Applicant: BOE Technology Group Co., Ltd.
Inventor： Long Han
Abstract: The present application discloses a display panel and a display device. The display panel includes: a base substrate; a reference power line, arranged in a non-display area and including a first electrode metal layer and a second electrode metal layer which are arranged on the base substrate in sequence in a stacked manner; and an encapsulating structure, arranged on a side, deviating from the base substrate, of the reference power line; where in the reference power line, a projection of the second electrode metal layer on the base substrate is arranged within a projection of the encapsulating structure on the base substrate, and a projection of the first electrode metal layer on the base substrate goes beyond an edge of the projection of the encapsulating structure on the base substrate.
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公开(公告)号：US10909916B2
公开(公告)日：2021-02-02
申请号：US16876697
申请日：2020-05-18
Inventor： Xiang Feng , Long Han , Yipeng Chen , Minghua Xuan , Ruizhi Yang , Sha Liu , Xiao Sun , Qiang Zhang , Zhaokun Yang , Yun Qiu
IPC: G09G3/3225 , G06F3/041 , G06K9/00 , G09G3/36
Abstract: The embodiments of the present disclosure disclose an OLED array substrate. The OLED array substrate comprises: a plurality of scan lines; a plurality of data lines; a plurality of OLED pixel units, each OLED pixel unit is connected to a corresponding data line and a corresponding scan line and being connected to a corresponding reset terminal; and a plurality of light detection units, each light detection unit is connected between the reset terminal of one OLED pixel unit and the corresponding data line, is configured to detect a light emitted by a detection light resource to generate a light detection signal, and output the light detection signal via the corresponding data line under a control of a reset signal from the reset terminal.
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公开(公告)号：US10204559B2
公开(公告)日：2019-02-12
申请号：US15377132
申请日：2016-12-13
IPC: G11C19/00 , G09G3/3258 , G09G3/3266 , G11C19/28 , H01L27/32 , G09G3/36
Abstract: There is disclosed a shift register unit, a gate driving circuit and a display device. The shift register unit includes a shift register module configured to delay a phase of a signal from the input terminal, and output the delayed signal at the first output terminal; a first input module configured to set the first node to be at a second voltage level; a second input module configured to set the first node to be at the first voltage level, and apply the signal from the input terminal to the first node; and an output module configured to set the second output terminal to be at the second voltage level when the first output terminal is at the first voltage level, and set the second output terminal to be at the first voltage level when the first node is at the first voltage level.
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