公开(公告)号：US07443197B2

公开(公告)日：2008-10-28

申请号：US11998725

申请日：2007-11-30

申请人： Barry A. Hoberman ,  Daniel L. Hillman ,  William G. Walker ,  John M. Callahan ,  Michael A. Zampaglione ,  Andrew Cole

发明人： Barry A. Hoberman ,  Daniel L. Hillman ,  William G. Walker ,  John M. Callahan ,  Michael A. Zampaglione ,  Andrew Cole

IPC分类号： H03K19/173

CPC分类号： H03K19/0016 ,  G11C5/14 ,  G11C5/144 ,  G11C5/148 ,  H02M3/07 ,  H03K3/0372 ,  H03K3/356086 ,  H03K3/356113 ,  H03K5/14 ,  H03K17/102 ,  H03K19/00315

摘要： An integrated circuit includes first circuitry and sleep transistor circuitry. The first circuitry receives input signals and processes the input signals. The first circuitry also retains data in a sleep state that has low leakage. The sleep transistor circuitry is coupled to the first circuitry and receives a sleep signal. The sleep circuitry reduces power consumption of the first circuitry in the sleep state to have low leakage based on the sleep signal while retaining the data in the first circuitry.

公开(公告)号：US08854077B2

公开(公告)日：2014-10-07

申请号：US13569613

申请日：2012-08-08

申请人： Barry A. Hoberman ,  Daniel L. Hillman ,  William G. Walker ,  John M. Callahan ,  Michael A. Zampaglione ,  Andrew Cole

发明人： Barry A. Hoberman ,  Daniel L. Hillman ,  William G. Walker ,  John M. Callahan ,  Michael A. Zampaglione ,  Andrew Cole

IPC分类号： H03K19/17

CPC分类号： H03K19/0016 ,  G11C5/14 ,  G11C5/144 ,  G11C5/148 ,  H02M3/07 ,  H03K3/0372 ,  H03K3/356086 ,  H03K3/356113 ,  H03K5/14 ,  H03K17/102 ,  H03K19/00315

摘要： An integrated circuit includes first circuitry and sleep transistor circuitry. The first circuitry receives input signals and processes the input signals. The first circuitry also retains data in a sleep state that has low leakage. The sleep transistor circuitry is coupled to the first circuitry and receives a sleep signal that has a negative voltage. The sleep circuitry reduces power consumption of the first circuitry in the sleep state to have low leakage based on the sleep signal while retaining the data in the first circuitry.

摘要翻译： 集成电路包括第一电路和睡眠晶体管电路。 第一个电路接收输入信号并处理输入信号。 第一电路还保持具有低泄漏的睡眠状态的数据。 睡眠晶体管电路耦合到第一电路并且接收具有负电压的睡眠信号。 休眠电路降低处于休眠状态的第一电路的功耗，以便在将数据保留在第一电路中的同时基于睡眠信号具有低泄漏。

公开(公告)号：US20110260785A1

公开(公告)日：2011-10-27

申请号：US13074291

申请日：2011-03-29

申请人： Barry A. Hoberman ,  Daniel L. Hillman ,  William G. Walker ,  John M. Callahan ,  Michael A. Zampaglione ,  Andrew Cole

发明人： Barry A. Hoberman ,  Daniel L. Hillman ,  William G. Walker ,  John M. Callahan ,  Michael A. Zampaglione ,  Andrew Cole

IPC分类号： G05F1/10

CPC分类号： H03K19/0016 ,  G11C5/14 ,  G11C5/144 ,  G11C5/148 ,  H02M3/07 ,  H03K3/0372 ,  H03K3/356086 ,  H03K3/356113 ,  H03K5/14 ,  H03K17/102 ,  H03K19/00315

摘要： An integrated circuit includes first circuitry and sleep transistor circuitry. The first circuitry receives input signals and processes the input signals. The first circuitry also retains data in a sleep state that has low leakage. The sleep transistor circuitry is coupled to the first circuitry and receives a sleep signal that has a negative voltage. The sleep circuitry reduces power consumption of the first circuitry in the sleep state to have low leakage based on the sleep signal while retaining the data in the first circuitry.

摘要翻译： 集成电路包括第一电路和睡眠晶体管电路。 第一个电路接收输入信号并处理输入信号。 第一电路还保持具有低泄漏的睡眠状态的数据。 睡眠晶体管电路耦合到第一电路并且接收具有负电压的睡眠信号。 休眠电路降低处于休眠状态的第一电路的功耗，以便在将数据保留在第一电路中的同时基于睡眠信号具有低泄漏。

公开(公告)号：US07940081B2

公开(公告)日：2011-05-10

申请号：US12542352

申请日：2009-08-17

申请人： Barry A. Hoberman ,  Daniel L. Hillman ,  William G. Walker ,  John M. Callahan ,  Michael A. Zampaglione ,  Andrew Cole

发明人： Barry A. Hoberman ,  Daniel L. Hillman ,  William G. Walker ,  John M. Callahan ,  Michael A. Zampaglione ,  Andrew Cole

IPC分类号： H03K19/173

CPC分类号： H03K19/0016 ,  G11C5/14 ,  G11C5/144 ,  G11C5/148 ,  H02M3/07 ,  H03K3/0372 ,  H03K3/356086 ,  H03K3/356113 ,  H03K5/14 ,  H03K17/102 ,  H03K19/00315

摘要： An integrated circuit includes first circuitry and sleep transistor circuitry. The first circuitry receives input signals and processes the input signals. The first circuitry also retains data in a sleep state that has low leakage. The sleep transistor circuitry is coupled to the first circuitry and receives a sleep signal that has a negative voltage. The sleep circuitry reduces power consumption of the first circuitry in the sleep state to have low leakage based on the sleep signal while retaining the data in the first circuitry.

摘要翻译： 集成电路包括第一电路和睡眠晶体管电路。 第一个电路接收输入信号并处理输入信号。 第一电路还保持具有低泄漏的睡眠状态的数据。 睡眠晶体管电路耦合到第一电路并且接收具有负电压的睡眠信号。 休眠电路降低处于休眠状态的第一电路的功耗，以便在将数据保留在第一电路中的同时基于睡眠信号具有低泄漏。

公开(公告)号：US20100060319A1

公开(公告)日：2010-03-11

申请号：US12542352

申请日：2009-08-17

申请人： Barry A. Hoberman ,  Daniel L. Hillman ,  William G. Walker ,  John M. Callahan ,  Michael A. Zampaglione ,  Andrew Cole

发明人： Barry A. Hoberman ,  Daniel L. Hillman ,  William G. Walker ,  John M. Callahan ,  Michael A. Zampaglione ,  Andrew Cole

IPC分类号： H03K19/094

CPC分类号： H03K19/0016 ,  G11C5/14 ,  G11C5/144 ,  G11C5/148 ,  H02M3/07 ,  H03K3/0372 ,  H03K3/356086 ,  H03K3/356113 ,  H03K5/14 ,  H03K17/102 ,  H03K19/00315

摘要： An integrated circuit includes first circuitry and sleep transistor circuitry. The first circuitry receives input signals and processes the input signals. The first circuitry also retains data in a sleep state that has low leakage. The sleep transistor circuitry is coupled to the first circuitry and receives a sleep signal that has a negative voltage. The sleep circuitry reduces power consumption of the first circuitry in the sleep state to have low leakage based on the sleep signal while retaining the data in the first circuitry.

摘要翻译： 集成电路包括第一电路和睡眠晶体管电路。 第一个电路接收输入信号并处理输入信号。 第一电路还保持具有低泄漏的睡眠状态的数据。 睡眠晶体管电路耦合到第一电路并且接收具有负电压的睡眠信号。 休眠电路降低处于休眠状态的第一电路的功耗，以便在将数据保留在第一电路中的同时基于睡眠信号具有低泄漏。

公开(公告)号：US07592837B2

公开(公告)日：2009-09-22

申请号：US12284311

申请日：2008-09-19

申请人： Barry A. Hoberman ,  Daniel L. Hillman ,  William G. Walker ,  John M. Callahan ,  Michael A. Zampaglione ,  Andrew Cole

发明人： Barry A. Hoberman ,  Daniel L. Hillman ,  William G. Walker ,  John M. Callahan ,  Michael A. Zampaglione ,  Andrew Cole

IPC分类号： H03K19/0175

CPC分类号： H03K19/0016 ,  G11C5/14 ,  G11C5/144 ,  G11C5/148 ,  H02M3/07 ,  H03K3/0372 ,  H03K3/356086 ,  H03K3/356113 ,  H03K5/14 ,  H03K17/102 ,  H03K19/00315

摘要： An integrated circuit includes first circuitry and sleep transistor circuitry. The first circuitry receives input signals and processes the input signals. The first circuitry also retains data in a sleep state that has low leakage. The sleep transistor circuitry is coupled to the first circuitry and receives a sleep signal that has a negative voltage. The sleep circuitry reduces power consumption of the first circuitry in the sleep state to have low leakage based on the sleep signal while retaining the data in the first circuitry.

摘要翻译： 集成电路包括第一电路和睡眠晶体管电路。 第一个电路接收输入信号并处理输入信号。 第一电路还保持具有低泄漏的睡眠状态的数据。 睡眠晶体管电路耦合到第一电路并且接收具有负电压的睡眠信号。 休眠电路降低处于休眠状态的第一电路的功耗，以便在将数据保留在第一电路中的同时基于睡眠信号具有低泄漏。

公开(公告)号：US07348804B2

公开(公告)日：2008-03-25

申请号：US11732181

申请日：2007-04-02

申请人： Barry A. Hoberman ,  Daniel L. Hillman ,  William G. Walker ,  John M. Callahan ,  Michael A. Zampaglione ,  Andrew Cole

发明人： Barry A. Hoberman ,  Daniel L. Hillman ,  William G. Walker ,  John M. Callahan ,  Michael A. Zampaglione ,  Andrew Cole

IPC分类号： H03K19/0175

CPC分类号： H03K19/0016 ,  G11C5/14 ,  G11C5/144 ,  G11C5/148 ,  H02M3/07 ,  H03K3/0372 ,  H03K3/356086 ,  H03K3/356113 ,  H03K5/14 ,  H03K17/102 ,  H03K19/00315

摘要： An integrated circuit includes first circuitry and sleep transistor circuitry. The first circuitry receives input signals and processes the input signals. The first circuitry also retains data in a sleep state that has low leakage. The sleep transistor circuitry is coupled to the first circuitry and receives a sleep signal that has a negative voltage. The sleep circuitry reduces power consumption of the first circuitry in the sleep state to have low leakage based on the sleep signal while retaining the data in the first circuitry.

摘要翻译： 集成电路包括第一电路和睡眠晶体管电路。 第一个电路接收输入信号并处理输入信号。 第一电路还保持具有低泄漏的睡眠状态的数据。 睡眠晶体管电路耦合到第一电路并且接收具有负电压的睡眠信号。 休眠电路降低处于休眠状态的第一电路的功耗，以便在将数据保留在第一电路中的同时基于睡眠信号具有低泄漏。

公开(公告)号：US07227383B2

公开(公告)日：2007-06-05

申请号：US11041687

申请日：2005-01-20

申请人： Barry A. Hoberman ,  Daniel L. Hillman ,  William G. Walker ,  John M. Callahan ,  Michael A. Zampaglione ,  Andrew Cole

发明人： Barry A. Hoberman ,  Daniel L. Hillman ,  William G. Walker ,  John M. Callahan ,  Michael A. Zampaglione ,  Andrew Cole

IPC分类号： H03K19/00

CPC分类号： H03K19/0016 ,  G11C5/14 ,  G11C5/144 ,  G11C5/148 ,  H02M3/07 ,  H03K3/0372 ,  H03K3/356086 ,  H03K3/356113 ,  H03K5/14 ,  H03K17/102 ,  H03K19/00315

摘要： An integrated circuit includes first circuitry and sleep transistor circuitry. The first circuitry receives input signals and processes the input signals. The first circuitry also retains data in a sleep state that has low leakage. The sleep transistor circuitry is coupled to the first circuitry and receives a sleep signal that has a negative voltage. The sleep circuitry reduces power consumption of the first circuitry in the sleep state to have low leakage based on the sleep signal while retaining the data in the first circuitry.

公开(公告)号：US20130027125A1

公开(公告)日：2013-01-31

申请号：US13569613

申请日：2012-08-08

申请人： Barry A. Hoberman ,  Daniel L. Hillman ,  William G. Walker ,  John M. Callahan ,  Michael A. Zampaglione ,  Andrew Cole

发明人： Barry A. Hoberman ,  Daniel L. Hillman ,  William G. Walker ,  John M. Callahan ,  Michael A. Zampaglione ,  Andrew Cole

IPC分类号： G05F1/10

CPC分类号： H03K19/0016 ,  G11C5/14 ,  G11C5/144 ,  G11C5/148 ,  H02M3/07 ,  H03K3/0372 ,  H03K3/356086 ,  H03K3/356113 ,  H03K5/14 ,  H03K17/102 ,  H03K19/00315

摘要： An integrated circuit includes first circuitry and sleep transistor circuitry. The first circuitry receives input signals and processes the input signals. The first circuitry also retains data in a sleep state that has low leakage. The sleep transistor circuitry is coupled to the first circuitry and receives a sleep signal that has a negative voltage. The sleep circuitry reduces power consumption of the first circuitry in the sleep state to have low leakage based on the sleep signal while retaining the data in the first circuitry.

摘要翻译： 集成电路包括第一电路和睡眠晶体管电路。 第一个电路接收输入信号并处理输入信号。 第一电路还保持具有低泄漏的睡眠状态的数据。 睡眠晶体管电路耦合到第一电路并且接收具有负电压的睡眠信号。 休眠电路降低处于休眠状态的第一电路的功率消耗，以便在将数据保留在第一电路中的同时基于睡眠信号具有低泄漏。

公开(公告)号：US08253438B2

公开(公告)日：2012-08-28

申请号：US13074291

申请日：2011-03-29

申请人： Barry A. Hoberman ,  Daniel L. Hillman ,  William G. Walker ,  John M. Callahan ,  Michael A. Zampaglione ,  Andrew Cole

发明人： Barry A. Hoberman ,  Daniel L. Hillman ,  William G. Walker ,  John M. Callahan ,  Michael A. Zampaglione ,  Andrew Cole

IPC分类号： H03K17/16

CPC分类号： H03K19/0016 ,  G11C5/14 ,  G11C5/144 ,  G11C5/148 ,  H02M3/07 ,  H03K3/0372 ,  H03K3/356086 ,  H03K3/356113 ,  H03K5/14 ,  H03K17/102 ,  H03K19/00315

摘要： An integrated circuit includes first circuitry and sleep transistor circuitry. The first circuitry receives input signals and processes the input signals. The first circuitry also retains data in a sleep state that has low leakage. The sleep transistor circuitry is coupled to the first circuitry and receives a sleep signal that has a negative voltage. The sleep circuitry reduces power consumption of the first circuitry in the sleep state to have low leakage based on the sleep signal while retaining the data in the first circuitry.

摘要翻译： 集成电路包括第一电路和睡眠晶体管电路。 第一个电路接收输入信号并处理输入信号。 第一电路还保持具有低泄漏的睡眠状态的数据。 睡眠晶体管电路耦合到第一电路并且接收具有负电压的睡眠信号。 休眠电路降低处于休眠状态的第一电路的功耗，以便在将数据保留在第一电路中的同时基于睡眠信号具有低泄漏。