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公开(公告)号：US20240212563A1
公开(公告)日：2024-06-27
申请号：US17912952
申请日：2021-10-28
发明人： Xibin SHAO , Yanping LIAO , Dongchuan CHEN , Yingmeng MIAO , Shulin YAO , Yinlong ZHANG , Qiujie SU , Jiantao LIU
IPC分类号： G09G3/20
CPC分类号： G09G3/2092 , G09G2310/0267 , G09G2310/0286 , G09G2310/08 , G09G2320/041
摘要： A display panel and a display device are disclosed. The display panel includes a gate driving circuit, a plurality of clock signal lines, a timing controller and a plurality of anti-cross-row circuits; the timing controller is configured to provide a first clock signal; the plurality of anti-cross-row circuits are connected with the timing controller and the plurality of clock signal lines, and are configured to adjust the first clock signal provided by the timing controller to a second clock signal, and output the second clock signal to the plurality of clock signal lines, and a falling duration of a falling edge of the second clock signal is less than a falling duration of a falling edge of the first clock signal; and each of the plurality of anti-cross-row circuits comprises at least one resistor and at least one inductor.
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公开(公告)号：US20160358569A1
公开(公告)日：2016-12-08
申请号：US15136206
申请日：2016-04-22
发明人： Baoyu LIU , Zhihua SUN , Seungmin LEE , Honglin ZHANG , Weichao MA , Jianming WANG , Shulin YAO , Xu ZHANG
CPC分类号： G09G3/3674 , G05F3/16 , G09G3/3696 , G09G2300/0852 , G09G2300/0871 , G09G2310/0248 , G09G2310/0286 , G09G2310/0289 , G09G2330/026 , G11C19/184
摘要： The present invention provides a voltage output device, which comprises a direct-current power supply, a reference level input terminal, a predetermined level output terminal, a voltage regulation module and a control signal generation module, the control signal generation module comprises a control signal generation unit, the voltage regulation module comprises a plurality of storage capacitors, wherein the control signal generation unit can send a charging control signal to the voltage regulation module in a charging stage of the voltage output device, and send an operation control signal to the voltage regulation module in an operating stage of the voltage output device. The present invention further provides a gate driving circuit and a display apparatus. With the voltage output device provided by the present invention, a high-level voltage that is high enough and/or a low-level voltage that is low enough can be outputted, thereby satisfying specific application requirements.
摘要翻译： 本发明提供一种电压输出装置，其包括直流电源，参考电平输入端子，预定电平输出端子，电压调节模块和控制信号生成模块，所述控制信号生成模块包括控制信号 所述电压调节模块包括多个存储电容器，其中所述控制信号生成单元可以在所述电压输出装置的充电级中向所述电压调节模块发送充电控制信号，并且向所述电压输出装置发送操作控制信号 调节模块在电压输出装置的运行阶段。 本发明还提供一种栅极驱动电路和显示装置。 利用本发明提供的电压输出装置，可以输出足够高的高电平电压和/或足够低的低电平电压，从而满足特定的应用要求。
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公开(公告)号：US20240321230A1
公开(公告)日：2024-09-26
申请号：US18578310
申请日：2022-07-27
发明人： Wenpeng MA , Yinlong ZHANG , Shulin YAO , Yingmeng MIAO , Pengfei HU , Yuhang TIAN , Zheng ZHANG , Yanping LIAO , Dongchuan CHEN , Jiantao LIU
IPC分类号： G09G3/36
CPC分类号： G09G3/3677 , G09G3/3688 , G09G2310/0286 , G09G2310/08 , G09G2340/0435
摘要： A display apparatus includes sub-pixels, at least one gate line group and a scan drive circuit. The gate line group includes a first gate line, a second gate line and a third gate line. The scan drive circuit outputs, in a frame scan cycle, a first scan signal to the first gate line, a second scan signal to the second gate line, and a third scan signal to the third gate line in sequence. Durations of effective scan periods of the scan signals are equal. A start moment of the effective scan period of the second scan signal is delayed by a first time length compared with that of the first scan signal. A start moment of the effective scan period of the third scan signal is delayed by a second time length less than the first time length compared with that of the second scan signal.
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公开(公告)号：US20240257778A1
公开(公告)日：2024-08-01
申请号：US18635531
申请日：2024-04-15
发明人： Dongchuan CHEN , Yanping LIAO , Yingmeng MIAO , Yinlong ZHANG , Shulin YAO , Xibin SHAO , Seungmin LEE , Jiantao LIU
IPC分类号： G09G3/36
CPC分类号： G09G3/3614 , G09G2310/0205 , G09G2310/0213 , G09G2310/0251 , G09G2310/08 , G09G2320/0257 , G09G2340/0435
摘要： A display driving method, a display driving device and a display device are provided. The display driving method includes: when displaying an odd-numbered frame, providing first parity row data of the odd-numbered frame to a display array, to enable a third parity row of the display array to be displayed based on real data of the first parity row data and enable a fourth parity row of the display array to be displayed based on interpolation data of the first parity row data; and when displaying an even-numbered frame, providing second parity row data of the even-numbered frame to the display array, to enable the fourth parity row of the display array to be displayed based on real data of the second parity row data and enable the third parity row of the display array to be displayed based on interpolation data of the second parity row data.
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公开(公告)号：US20230360615A1
公开(公告)日：2023-11-09
申请号：US17633008
申请日：2021-04-09
发明人： Dongchuan CHEN , Yanping LIAO , Yingmeng MIAO , Yinlong ZHANG , Shulin YAO , Xibin SHAO , Seungmin LEE , Jiantao LIU
IPC分类号： G09G3/36
CPC分类号： G09G3/3614 , G09G2310/08 , G09G2310/0213 , G09G2310/0251 , G09G2310/0205 , G09G2320/0257 , G09G2340/0435
摘要： A display driving method, a display driving device and a display device are provided. The display driving method includes: when displaying an odd-numbered frame, providing first parity row data of the odd-numbered frame to a display array, to enable a third parity row of the display array to be displayed based on real data of the first parity row data and enable a fourth parity row of the display array to be displayed based on interpolation data of the first parity row data; and when displaying an even-numbered frame, providing second parity row data of the even-numbered frame to the display array, to enable the fourth parity row of the display array to be displayed based on real data of the second parity row data and enable the third parity row of the display array to be displayed based on interpolation data of the second parity row data.
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公开(公告)号：US20230086825A1
公开(公告)日：2023-03-23
申请号：US17801728
申请日：2021-10-22
发明人： Yinlong ZHANG , Shulin YAO , Wenpeng MA , Pengfei HU , Qi LI , Zhihua SUN , Yanping LIAO , Xibin SHAO
摘要： The present disclosure provides a chip-on-film, a display substrate, a display device and a driving method. The display substrate includes a plurality of scanning lines and a plurality of cascaded shift register units coupled to the scanning lines. The display substrate further includes an output control signal line electrically coupled to each shift register unit for providing an enable signal for the shift register unit. The output control signal lines include at least two output control signal lines for providing different enable signals, and two adjacent cascaded shift register units are coupled to different output control signal lines.
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公开(公告)号：US20220122507A1
公开(公告)日：2022-04-21
申请号：US17275549
申请日：2020-05-19
发明人： Yinlong ZHANG , Zhihua SUN , Shulin YAO , Wenpeng MA , Pengfei HU , Liangliang ZHAO
IPC分类号： G09G3/20
摘要： The present disclosure provides a power management device, including an initial voltage input terminal, a power management circuit, and a plurality of gamma correction circuits. The initial voltage input terminal is configured to provide an initial voltage; the power management circuit includes at least one follower amplifier sub-circuit, each follower amplifier sub-circuit is configured to output a corresponding target operating voltage according to the initial voltage, a reference voltage, and a target operating voltage setting parameter; and each gamma correction circuit is configured to output a corresponding gamma correction voltage according to the initial voltage, the reference voltage, and a corresponding gamma parameter. The present disclosure further provides a display device.
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公开(公告)号：US20240339089A1
公开(公告)日：2024-10-10
申请号：US18580697
申请日：2022-07-01
发明人： Yanping LIAO , Dong LIU , Yingmeng MIAO , Dongchuan CHEN , Qiujie SU , Yinlong ZHANG , Shulin YAO , Xibin SHAO , Seungmin LEE , Xiaofeng YIN
CPC分类号： G09G3/3677 , G06F3/04166 , G09G2300/0408 , G09G2310/0286 , G09G2320/0233 , G09G2354/00
摘要： The present disclosure provides a display panel driving method, a display panel and a display device, the method comprising: comprising alternately configure display time periods and touch time periods in one time frame, at least one touch time period being configured, and at least two display time periods being configured; sequentially scanning in each display time period a portion of gate lines in a display panel; and pausing in each touch time period the scanning of all gate lines, and performing touch recognition, wherein in a display time period adjacent to a touch time period, level compensation is performed on a gate line to be compensated, and the gate line to be compensated is at least one gate line that starts to scan in the display time period adjacent to the touch time period.
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公开(公告)号：US20240296775A1
公开(公告)日：2024-09-05
申请号：US18027534
申请日：2022-03-30
发明人： Wenpeng MA , Shulin YAO , Yanping LIAO , Panhui ZHAO , Dongchuan CHEN , Pengfei HU , Zheng ZHANG , Yingmeng MIAO
IPC分类号： G09G3/20
CPC分类号： G09G3/2092 , G09G3/2007 , G09G2300/0408 , G09G2310/0286 , G09G2310/08
摘要： A driving circuit, a display device, and a driving method are disclosed. The driving circuit includes a level conversion unit and a gate electrode driving unit; and the gate electrode driving unit is configured to sequentially shift and output a plurality of first gate scan signals by a first portion of the 2n gate signal output terminals in response to a first portion of the plurality of first output signals received at a first moment by a first portion of the plurality of second clock signal input terminals, and sequentially output a plurality of second gate scan signals by a second portion of the 2n gate signal output terminals in response to a second portion of the plurality of first output signals received at a second moment by a second portion of the plurality of second clock signal input terminals.
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公开(公告)号：US20190279560A1
公开(公告)日：2019-09-12
申请号：US16168958
申请日：2018-10-24
发明人： Jituo TANG , Guohuo SU , Shulin YAO , Zhihua SUN , Yinlong ZHANG , Xu ZHANG , Ning ZHANG , Wenpeng MA
IPC分类号： G09G3/3208 , H02M3/07
摘要： A charge pump, a voltage control method for the charge pump, and a display device are provided. The charge pump includes a voltage output end and a first step-up circuitry. The first step-up circuitry includes a first energy storage unit, a second energy storage unit, a first input control unit, a first voltage application control unit, a first output control unit and a first charging path control unit. The first voltage application control unit is configured to enable a first end of the first energy storage unit to be electrically connected to, or electrically disconnected from, a first voltage end, and enable a first end of the second energy storage unit to be electrically connected to, or electrically disconnected from, a second voltage end.
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