公开(公告)号：US20120317576A1

公开(公告)日：2012-12-13

申请号：US13516313

申请日：2010-12-02

申请人： Bernd Mueller ,  Markus Ferch ,  Yorck Von Collani ,  Holger Banski

发明人： Bernd Mueller ,  Markus Ferch ,  Yorck Von Collani ,  Holger Banski

IPC分类号： G06F9/46

CPC分类号： G06F11/1695 ,  G06F11/0715 ,  G06F11/0724 ,  G06F11/0739 ,  G06F11/0757 ,  G06F11/1487 ,  G06F11/1633 ,  G06F11/1645 ,  G06F11/1654 ,  G06F11/1683 ,  G06F11/1687 ,  G06F11/1691 ,  G06F2201/83

摘要： A method for operating an arithmetic unit having at least two computation cores. One signature register which has multiple inputs is assigned in each case to at least two of the at least two computation cores. At least one task is executed by the at least two of the at least two computation cores, an algorithm is computed in each task, results computed by each computation core are written into the assigned signature register, and the results written into the signature registers are compared.

摘要翻译： 一种用于操作具有至少两个计算核心的运算单元的方法。 具有多个输入的一个签名寄存器在每种情况下分配给至少两个计算核心中的至少两个。 由至少两个计算核心中的至少两个执行至少一个任务，在每个任务中计算算法，由每个计算核心计算的结果被写入分配的签名寄存器，并且写入签名寄存器的结果是 比较。

公开(公告)号：US20100174448A1

公开(公告)日：2010-07-08

申请号：US12655527

申请日：2009-12-30

申请人： Bernd Mueller ,  Markus Ferch ,  Yorck von Collani ,  Holger Banski

发明人： Bernd Mueller ,  Markus Ferch ,  Yorck von Collani ,  Holger Banski

IPC分类号： G01M17/00

CPC分类号： G06F11/1645 ,  G06F11/165 ,  G06F11/1695

摘要： A control unit has two pairs of execution units, the two execution units of each pair redundantly processing the same program, and the output signals of each execution unit of one pair being compared to one another by a respective comparing unit, the respective comparing unit outputting an error signal when a difference in the output signals of the execution units of one pair occurs. A first pair of execution units are shut down when the error signal occurs for the first pair, and the control unit continues control operation using the second pair of execution units, and a pre-warning signal is output to the driver.

摘要翻译： 控制单元具有两对执行单元，每对的两个执行单元冗余地处理相同的程序，并且通过相应的比较单元将一对的每个执行单元的输出信号彼此进行比较，相应的比较单元输出 当一对执行单元的输出信号的差异发生时的误差信号。 当第一对发生错误信号时，第一对执行单元被关闭，并且控制单元使用第二对执行单元继续控制操作，并且向驾驶员输出预警信号。

公开(公告)号：US20120246650A1

公开(公告)日：2012-09-27

申请号：US13497021

申请日：2010-09-16

申请人： Bernd Mueller ,  Markus Ferch ,  Yorck von Collani ,  Holger Banski

发明人： Bernd Mueller ,  Markus Ferch ,  Yorck von Collani ,  Holger Banski

IPC分类号： G06F9/46

CPC分类号： G06F9/5066

摘要： A method for processing information and activities in a control and/or regulating system in which the control and/or regulating tasks are performed by a microcontroller, the control/regulating system including different components and the microcontroller receiving information which is evaluated and processed thereby, and at least one output signal being output as the result of control/regulating calculations. In a method for processing information and activities in a control and/or regulating system which may be implemented cost-effectively and nevertheless permits high computing power, the control and regulating tasks of the system are divided into component-specific task complexes, a first component-specific task complex being processed by a first processor core of the microcontroller and a second component-specific task complex being processed by a second processor core of the microcontroller.

摘要翻译： 一种用于在控制和/或调节系统中处理控制和/或调节任务的方法，其中微控制器执行控制和/或调节任务，所述控制/调节系统包括不同的部件，并且微控制器接收由此评估和处理的信息， 并且作为控制/调节计算的结果输出至少一个输出信号。 在用于处理控制和/或调节系统中的信息和活动的方法中，可以以成本有效的方式实现并且允许高计算能力，系统的控制和调节任务被划分成特定于组件的任务复合体，第一组件 特定任务复合体由微控制器的第一处理器核处理，以及由微控制器的第二处理器核处理的第二组件特定任务复合体。

公开(公告)号：US20090327838A1

公开(公告)日：2009-12-31

申请号：US11989383

申请日：2006-07-28

申请人： Thomas Kottke ,  Yorck von Collani ,  Markus Ferch

发明人： Thomas Kottke ,  Yorck von Collani ,  Markus Ferch

IPC分类号： H03M13/05 ,  G06F11/10

CPC分类号： G06F11/1008

摘要： A memory system includes a writable data memory and means for recognizing an error in a data word read out from the data memory, correcting the error, and storing the corrected data word at a new address in a free area of the data memory.

摘要翻译： 存储器系统包括可写数据存储器和用于识别从数据存储器读出的数据字中的错误的装置，校正该错误，以及将修正的数据字存储在数据存储器的空闲区域中的新地址处。

公开(公告)号：US20100281485A1

公开(公告)日：2010-11-04

申请号：US12308476

申请日：2007-09-19

申请人： Markus Ferch ,  Yorck von Collani

发明人： Markus Ferch ,  Yorck von Collani

IPC分类号： G06F9/48

CPC分类号： G06F9/4881 ,  G06F11/1641 ,  G06F2201/845 ,  G06F2209/483

摘要： A system having multiple execution units and a method for its changeover are provided. The system having multiple execution units has at least two execution units, and may be changed over between a performance operating mode, in which the execution units execute different programs, and a comparison operating mode, in which the execution units execute the same program. The system has a scheduler, which is called by an execution unit to ascertain the next program to be executed. The remaining execution units are prompted to also call the scheduler if the program ascertained by the first called scheduler is to be executed in a comparison operating mode. A changeover unit changes over the system having multiple execution units from the performance operating mode into the comparison operating mode if the program to be executed ascertained by the last called scheduler is to be executed in the comparison operating mode, this ascertained program to be executed being executed as the program having the highest priority by all execution units after the changeover of the system into the comparison operating mode.

摘要翻译： 提供具有多个执行单元的系统及其切换方法。 具有多个执行单元的系统具有至少两个执行单元，并且可以在其中执行单元执行不同程序的执行操作模式和执行单元执行相同程序的比较操作模式之间切换。 该系统具有调度器，该调度器由执行单元调用以确定要执行的下一个程序。 如果要在比较操作模式下执行由第一调用调度程序确定的程序，则提示剩余的执行单元也调用调度程序。 如果要在比较操作模式中执行由最后调用的调度器确定的要执行的程序，则该确定的要执行的程序为切换单元，则将切换单元从具有多个执行单元的系统改变为比较操作模式 在将系统切换到比较操作模式之后，作为所有执行单元具有最高优先级的程序执行。

公开(公告)号：US20120144140A1

公开(公告)日：2012-06-07

申请号：US13306715

申请日：2011-11-29

申请人： Christine Rossa ,  Bernd Mueller ,  Markus Ferch ,  Carsten Gebauer ,  Dieter Thoss ,  Michael Ebert

发明人： Christine Rossa ,  Bernd Mueller ,  Markus Ferch ,  Carsten Gebauer ,  Dieter Thoss ,  Michael Ebert

IPC分类号： G06F12/14

CPC分类号： G06F12/1425 ,  G06F21/79

摘要： A memory protection unit includes at least a first access control unit and a second access control unit programmed for controlling an access to a memory device. Further a method to operate a processing system comprising multiple processing devices and multiple memory protection units associated to the multiple processing devices, The access to the memory by a processing device is approved if first access control unit and second access control unit of the memory protection associated to the processing device approves the access and access is rejected if first access control unit or second access control unit rejects the access. The first access control unit is programmable by the associated processing device alone and the programming of the second access control unit is readable by an additional processing device which is to be used in a system with multiple programming devices, not the associate processing device.

摘要翻译： 存储器保护单元至少包括第一访问控制单元和被编程用于控制对存储器设备的访问的第二访问控制单元。 此外，操作包括与多个处理设备相关联的多个处理设备和多个存储器保护单元的处理系统的方法。如果存储器保护的第一访问控制单元和第二访问控制单元相关联，则由处理设备访问存储器被批准 如果第一访问控制单元或第二访问控制单元拒绝该访问，则处理设备批准该访问和访问被拒绝。 第一访问控制单元可以由相关联的处理设备单独编程，并且第二访问控制单元的编程可由附加处理设备读取，该附加处理设备将用于具有多个编程设备的系统中，而不是关联处理设备。

公开(公告)号：US08984245B2

公开(公告)日：2015-03-17

申请号：US13306715

申请日：2011-11-29

申请人： Christine Rossa ,  Bernd Mueller ,  Markus Ferch ,  Carsten Gebauer ,  Dieter Thoss ,  Michael Ebert

发明人： Christine Rossa ,  Bernd Mueller ,  Markus Ferch ,  Carsten Gebauer ,  Dieter Thoss ,  Michael Ebert

IPC分类号： G06F12/14 ,  G06F21/79

CPC分类号： G06F12/1425 ,  G06F21/79

摘要： A memory protection unit includes at least a first access control unit and a second access control unit programmed for controlling an access to a memory device. Further a method to operate a processing system comprising multiple processing devices and multiple memory protection units associated to the multiple processing devices. The access to the memory by a processing device is approved if first access control unit and second access control unit of the memory protection associated to the processing device approves the access and access is rejected if first access control unit or second access control unit rejects the access. The first access control unit is programmable by the associated processing device alone and the programming of the second access control unit is readable by an additional processing device which is to be used in a system with multiple programming devices, not the associate processing device.

摘要翻译： 存储器保护单元至少包括第一访问控制单元和被编程用于控制对存储器设备的访问的第二访问控制单元。 另外，一种操作处理系统的方法，该处理系统包括与多个处理设备相关联的多个处理设备和多个存储器保护单元。 如果与处理设备相关联的存储器保护的第一访问控制单元和第二访问控制单元批准访问并且如果第一访问控制单元或第二访问控制单元拒绝访问则访问被拒绝，由处理设备访问存储器被批准 。 第一访问控制单元可以由相关联的处理设备单独编程，并且第二访问控制单元的编程可由附加处理设备读取，该附加处理设备将用于具有多个编程设备的系统中，而不是关联处理设备。