公开(公告)号：US07350020B2

公开(公告)日：2008-03-25

申请号：US11497171

申请日：2006-08-01

申请人： Bhushan Mangesh Kanekar ,  Venkateshwar Rao Pullela ,  Dileep Kumar Devireddy ,  Gyaneshwar S. Saharia ,  Dipankar Bhattacharya ,  Qizhong Chen

发明人： Bhushan Mangesh Kanekar ,  Venkateshwar Rao Pullela ,  Dileep Kumar Devireddy ,  Gyaneshwar S. Saharia ,  Dipankar Bhattacharya ,  Qizhong Chen

IPC分类号： G06F12/00

CPC分类号： H04L45/00 ,  G06F17/30982 ,  H04L45/54 ,  H04L45/7453 ,  H04L47/2441

摘要： Methods, apparatus, and other mechanisms are disclosed for merging lookup results, such as from one or more associative memory banks and/or memory devices. In one exemplary implementation, multiple associative memories or associative memory banks are configured to substantially simultaneously generate a plurality of lookup results based on a lookup value. Multiple memories are each configured to generate a corresponding result based on the lookup result generated by its corresponding associative memory or associative memory bank. A combiner is configured to receive and merge these corresponding results generated substantially simultaneously in order to identify the merged lookup result.

摘要翻译： 公开了用于合并诸如来自一个或多个关联存储体和/或存储器装置的查找结果的方法，装置和其它机制。 在一个示例性实现中，多个关联存储器或关联存储器组被配置为基于查找值基本上同时生成多个查找结果。 多个存储器被配置为基于由其相应的关联存储器或关联存储体生成的查找结果来产生相应的结果。 组合器被配置为接收并合并基本同时生成的这些对应结果，以便识别合并的查找结果。

公开(公告)号：US07177978B2

公开(公告)日：2007-02-13

申请号：US10630174

申请日：2003-07-29

申请人： Bhushan Mangesh Kanekar ,  Venkateshwar Rao Pullela ,  Dileep Kumar Devireddy ,  Gyaneshwar S. Saharia ,  Dipankar Bhattacharya ,  Qizhong Chen

发明人： Bhushan Mangesh Kanekar ,  Venkateshwar Rao Pullela ,  Dileep Kumar Devireddy ,  Gyaneshwar S. Saharia ,  Dipankar Bhattacharya ,  Qizhong Chen

IPC分类号： G06F12/00

CPC分类号： H04L45/00 ,  G06F17/30982 ,  H04L45/54 ,  H04L45/7453 ,  H04L47/2441

摘要： Methods, apparatus, and other mechanisms are disclosed for merging lookup results, such as from one or more associative memory banks and/or memory devices. An access list is identified. A first set of entries corresponding to a first feature of the access control list entries and a second set of entries corresponding to a second feature of the access control list entries are identified. First and second associative memory banks are programmed respectively based on the first and second sets of entries. Lookup operations are then typically performed substantially simultaneously on the first and second sets of associative memory entries programmed in the associative memory banks to generate multiple lookup results, with these results typically being identified directly, or via a lookup operation in an adjunct memory or other storage mechanism. These lookup results are then combined to generate a merged lookup result.

摘要翻译： 公开了用于合并诸如来自一个或多个关联存储体和/或存储器装置的查找结果的方法，装置和其它机制。 识别访问列表。 识别对应于访问控制列表条目的第一特征的第一组条目和与访问控制列表条目的第二特征相对应的第二组条目。 基于第一和第二组条目分别对第一和第二关联存储体进行编程。 然后，通常在关联存储器组中编程的第一组和第二组关联存储器条目上基本上同时执行查找操作，以生成多个查找结果，这些结果通常直接被识别，或者经由辅助存储器或其他存储器中的查找操作 机制。 然后将这些查找结果组合以生成合并的查找结果。

公开(公告)号：US07689485B2

公开(公告)日：2010-03-30

申请号：US10630178

申请日：2003-07-29

申请人： Bhushan Mangesh Kanekar ,  Venkateshwar Rao Pullela ,  Dileep Kumar Devireddy ,  Suresh Gurajapu ,  Gyaneshwar S. Saharia ,  Atul Rawat

发明人： Bhushan Mangesh Kanekar ,  Venkateshwar Rao Pullela ,  Dileep Kumar Devireddy ,  Suresh Gurajapu ,  Gyaneshwar S. Saharia ,  Atul Rawat

IPC分类号： G06Q99/00

CPC分类号： G06F17/30982 ,  G06Q40/00 ,  G06Q40/12

摘要： Methods, apparatus, and other mechanisms are disclosed for generating accounting or other data based on that indicated in access control lists or other specifications, and typically using associative memory entries in one or more associative memory banks and/or memory devices. One implementation identifies an access control list including multiple access control list entries, with a subset of these access control list entries identifying accounting requests. Accounting mechanisms are associated with each of said access control list entries in the subset of access control list entries identifying accounting requests. An item is identified, and a corresponding accounting mechanism is updated. In one implementation, the item includes at least one autonomous system number. In one implementation, at least one of the accounting mechanisms is associated with at least two different access control list entries in the subset of access control list entries identifying accounting requests.

摘要翻译： 公开了用于基于访问控制列表或其他规范中指示的并且通常在一个或多个关联存储器组和/或存储器件中使用关联存储器条目来生成计帐或其他数据的方法，装置和其他机制。 一个实现标识包括多个访问控制列表条目的访问控制列表，其中这些访问控制列表条目的子集标识记帐请求。 计帐机制与识别计费请求的访问控制列表条目的子集中的每个所述访问控制列表条目相关联。 识别项目，并更新相应的计帐机制。 在一个实现中，该项目包括至少一个自主系统号码。 在一个实现中，至少一个计帐机制与识别计费请求的访问控制列表条目的子集中的至少两个不同的访问控制列表条目相关联。

公开(公告)号：US08902908B2

公开(公告)日：2014-12-02

申请号：US11416988

申请日：2006-05-02

申请人： Michael R. Smith ,  Gyaneshwar S. Saharia ,  Gaetano Borgione ,  Atul Rawat

发明人： Michael R. Smith ,  Gyaneshwar S. Saharia ,  Gaetano Borgione ,  Atul Rawat

IPC分类号： H04L12/28 ,  H04L12/56 ,  H04L12/723 ,  H04L12/46

CPC分类号： H04L12/4641 ,  H04L45/50

摘要： Disclosed are, inter alia, methods, apparatus, data structures, computer-readable media, mechanisms, and means for supporting a large number of virtual local area networks (VLANS) in a bridged network. Packets are received that include 802.1Q Virtual Local Area Network (VLAN) identifiers (VIDs). However, rather than accessing the VLAN forwarding information directly based on the VID as conventionally performed, the VLAN forwarding information to use for a particular packet is determined based on an interface (e.g., virtual or physical interface, port, MPLS label, GRE tunnel or other abstraction of the interface). In other words, the interface associated with the packet identifies a context for determining the VLAN forwarding information based on the VID included in the packet. Therefore, network bridging devices can support more VLANs than that imposed by the 4096 possible values of a VID.

摘要翻译： 公开了尤其是用于支持桥接网络中的大量虚拟局域网（VLAN）的方法，装置，数据结构，计算机可读介质，机制和装置。 收到包含802.1Q虚拟局域网（VLAN）标识符（VID）的数据包。 但是，根据传统的VID直接访问VLAN转发信息，而不是根据接口（例如，虚拟或物理接口，端口，MPLS标签，GRE隧道或者接口）来确定用于特定数据包的VLAN转发信息， 接口的其他抽象）。 换句话说，与分组相关联的接口基于分组中包括的VID来标识用于确定VLAN转发信息的上下文。 因此，网络桥接设备可以支持比VID的4096个可能值所施加的更多的VLAN。

公开(公告)号：US20080052582A1

公开(公告)日：2008-02-28

申请号：US11493784

申请日：2006-07-26

申请人： Hongshin Jun ,  Gyaneshwar S. Saharia ,  William Eklow

发明人： Hongshin Jun ,  Gyaneshwar S. Saharia ,  William Eklow

IPC分类号： G01R31/28

CPC分类号： G06F11/267

摘要： Disclosed are, inter alia, methods, apparatus, data structures, computer-readable media, mechanisms, and means for providing a JTAG to system bus interface for accessing embedded analysis system(s). JTAG commands are received and converted into commands sent out a bus to a device including an embedded analysis instrument, with results received over the bus forwarded out the JTAG interface to an external device. Such a JTAG to system bus interface may eliminate the need to provide separate JTAG TAP interfaces on each ASIC of a board, and/or eliminate the need to daisy chain multiple TAP interfaces of multiple ASICs in order to provide a single TAP interface for accessing the multiple embedded testing instruments.

摘要翻译： 公开的方法，装置，数据结构，计算机可读介质，机制和装置，用于向用于访问嵌入式分析系统的系统总线接口提供JTAG。 JTAG命令被接收并转换成发送到包括嵌入式分析仪器的设备的总线的命令，通过总线接收的结果将JTAG接口转发到外部设备。 这样的JTAG到系统总线接口可以消除在板的每个ASIC上提供单独的JTAG TAP接口的需要，和/或不需要菊花链多个ASIC的多个TAP接口，以便提供单个TAP接口来访问 多种嵌入式测试仪器。

公开(公告)号：US07543208B2

公开(公告)日：2009-06-02

申请号：US11493784

申请日：2006-07-26

申请人： Hongshin Jun ,  Gyaneshwar S. Saharia ,  William Eklow

发明人： Hongshin Jun ,  Gyaneshwar S. Saharia ,  William Eklow

IPC分类号： G01R31/28

CPC分类号： G06F11/267

摘要： Disclosed are, inter alia, methods, apparatus, data structures, computer-readable media, mechanisms, and means for providing a JTAG to system bus interface for accessing embedded analysis system(s). JTAG commands are received and converted into commands sent out a bus to a device including an embedded analysis instrument, with results received over the bus forwarded out the JTAG interface to an external device. Such a JTAG to system bus interface may eliminate the need to provide separate JTAG TAP interfaces on each ASIC of a board, and/or eliminate the need to daisy chain multiple TAP interfaces of multiple ASICs in order to provide a single TAP interface for accessing the multiple embedded testing instruments.

摘要翻译： 公开的方法，装置，数据结构，计算机可读介质，机制和装置，用于向用于访问嵌入式分析系统的系统总线接口提供JTAG。 JTAG命令被接收并转换成发送到包括嵌入式分析仪器的设备的总线的命令，通过总线接收的结果将JTAG接口转发到外部设备。 这样的JTAG到系统总线接口可以消除在板的每个ASIC上提供单独的JTAG TAP接口的需要，和/或不需要菊花链多个ASIC的多个TAP接口，以便提供单个TAP接口来访问 多种嵌入式测试仪器。