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公开(公告)号：US08059454B2
公开(公告)日：2011-11-15
申请号：US12531851
申请日：2008-12-01
Applicant: Bin Li , Adam Matthew Bumgarner , Daniel Pirkl , George Michael
Inventor： Bin Li , Adam Matthew Bumgarner , Daniel Pirkl , George Michael
IPC: G11C7/00
CPC classification number: G11C29/02 , G11C13/0004 , G11C13/0038 , G11C13/0069 , G11C29/021 , G11C29/028 , G11C2013/0092
Abstract: An adjustable write pulse generator is disclosed. The adjustable write pulse generator includes a band-gap reference current, a programmable ring oscillator, a frequency divider and a single pulse generator. The band-gap reference current circuit generates a well-compensated current over a predetermined range of temperatures needed to program a chalcogenide memory cell. The programmable ring oscillator generates a first set of continuous write “0” and write “1” pulse signals based on the well-compensated current. The frequency divider then divides the first set of continuous write “0” and write “1” pulse signals into a second set of continuous write “0” and write “1” pulse signals. The single pulse generator subsequently converts the second set of continuous write “0” and write “1” pulse signals into a single write “0” pulse signal or a single write “1” pulse signal when programming the chalcogenide memory cell.
Abstract translation: 公开了一种可调写入脉冲发生器。 可调写脉冲发生器包括带隙参考电流，可编程环形振荡器，分频器和单脉冲发生器。 带隙参考电流电路在编程硫属化物存储器单元所需的温度的预定范围内产生良好补偿的电流。 可编程环形振荡器基于良好补偿的电流产生第一组连续写入“0”和写入“1”脉冲信号。 分频器然后将第一组连续写入“0”和“1”脉冲信号分成第二组连续写“0”和写“1”脉冲信号。 当编程硫族化物存储单元时，单脉冲发生器随后将第二组连续写入“0”和“1”脉冲信号转换为单个写入“0”脉冲信号或单个写入“1”脉冲信号。
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公开(公告)号：US20100074000A1
公开(公告)日：2010-03-25
申请号：US12525510
申请日：2008-11-26
Applicant: Bin Li , Adam Matthew Bumgarner
Inventor： Bin Li , Adam Matthew Bumgarner
CPC classification number: G11C13/004 , G11C13/0004 , G11C27/005 , G11C29/026 , G11C29/1201 , G11C29/50 , G11C2013/0054 , G11C2029/5006
Abstract: An analog access circuit for characterizing chalcogenide memory cells is disclosed. The analog access circuit includes an analog access control module, an address and data control module, and an analog cell access and current monitoring module. The analog access control module selectively controls whether a normal memory access or an analog memory access should be performed on a specific chalcogenide memory cell. The address and data control module allows a normal memory access to the chalcogenide memory cell according to an input address. The analog cell access and current monitoring module performs an analog memory access to the chalcogenide memory cell according to the input address, and monitors a reference current from a sense amplifier associated with the chalcogenide memory cell.
Abstract translation: 公开了一种用于表征硫族化物存储器单元的模拟存取电路。 模拟访问电路包括模拟访问控制模块，地址和数据控制模块以及模拟单元访问和电流监控模块。 模拟访问控制模块选择性地控制是否应该在特定的硫族化物存储器单元上执行正常存储器存取或模拟存储器访问。 地址和数据控制模块允许根据输入地址对硫属化物存储器单元进行正常存储器访问。 模拟电池接入和电流监测模块根据输入地址对硫族化物存储单元进行模拟存储器存取，并监测来自与硫族化物存储单元相关联的读出放大器的参考电流。
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公开(公告)号：US20100135070A1
公开(公告)日：2010-06-03
申请号：US12531851
申请日：2008-12-01
Applicant: Bin Li , Adam Matthew Bumgarner , Daniel Pirkl , George Michael
Inventor： Bin Li , Adam Matthew Bumgarner , Daniel Pirkl , George Michael
IPC: G11C11/00
CPC classification number: G11C29/02 , G11C13/0004 , G11C13/0038 , G11C13/0069 , G11C29/021 , G11C29/028 , G11C2013/0092
Abstract: An adjustable write pulse generator is disclosed. The adjustable write pulse generator includes a band-gap reference current, a programmable ring oscillator, a frequency divider and a single pulse generator. The band-gap reference current circuit generates a well-compensated current over a predetermined range of temperatures needed to program a chalcogenide memory cell. The programmable ring oscillator generates a first set of continuous write “0” and write “1” pulse signals based on the well-compensated current. The frequency divider then divides the first set of continuous write “0” and write “1” pulse signals into a second set of continuous write “0” and write “1” pulse signals. The single pulse generator subsequently converts the second set of continuous write “0” and write “1” pulse signals into a single write “0” pulse signal or a single write “1” pulse signal when programming the chalcogenide memory cell.
Abstract translation: 公开了一种可调写入脉冲发生器。 可调写脉冲发生器包括带隙参考电流，可编程环形振荡器，分频器和单脉冲发生器。 带隙参考电流电路在编程硫属化物存储器单元所需的温度的预定范围内产生良好补偿的电流。 可编程环形振荡器基于良好补偿的电流产生第一组连续写入“0”和写入“1”脉冲信号。 分频器然后将第一组连续写入“0”和“1”脉冲信号分成第二组连续写“0”和写“1”脉冲信号。 当编程硫族化物存储单元时，单脉冲发生器随后将第二组连续写入“0”和“1”脉冲信号转换为单个写入“0”脉冲信号或单个写入“1”脉冲信号。
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公开(公告)号：US07986550B2
公开(公告)日：2011-07-26
申请号：US12525510
申请日：2008-11-26
Applicant: Bin Li , Adam Matthew Bumgarner
Inventor： Bin Li , Adam Matthew Bumgarner
IPC: G11C7/00
CPC classification number: G11C13/004 , G11C13/0004 , G11C27/005 , G11C29/026 , G11C29/1201 , G11C29/50 , G11C2013/0054 , G11C2029/5006
Abstract: An analog access circuit for characterizing chalcogenide memory cells is disclosed. The analog access circuit includes an analog access control module, an address and data control module, and an analog cell access and current monitoring module. The analog access control module selectively controls whether a normal memory access or an analog memory access should be performed on a specific chalcogenide memory cell. The address and data control module allows a normal memory access to the chalcogenide memory cell according to an input address. The analog cell access and current monitoring module performs an analog memory access to the chalcogenide memory cell according to the input address, and monitors a reference current from a sense amplifier associated with the chalcogenide memory cell.
Abstract translation: 公开了一种用于表征硫族化物存储器单元的模拟存取电路。 模拟访问电路包括模拟访问控制模块，地址和数据控制模块以及模拟单元访问和电流监控模块。 模拟访问控制模块选择性地控制是否应该在特定的硫族化物存储器单元上执行正常存储器存取或模拟存储器访问。 地址和数据控制模块允许根据输入地址对硫属化物存储器单元进行正常存储器访问。 模拟电池接入和电流监测模块根据输入地址对硫族化物存储单元进行模拟存储器存取，并监测来自与硫族化物存储单元相关联的读出放大器的参考电流。
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5.发明申请Read Reference Circuit for a Sense Amplifier Within a Chalcogenide Memory Device 有权读取硫属化物存储器件内的读出放大器的参考电路公开(公告)号：US20100002500A1
公开(公告)日：2010-01-07
申请号：US12525482
申请日：2008-11-26
Applicant: Bin Li , Adam Matthew Bumgarner , Daniel Pirkl
Inventor： Bin Li , Adam Matthew Bumgarner , Daniel Pirkl
CPC classification number: G11C7/14 , G11C7/12 , G11C13/0004 , G11C13/0026 , G11C13/004 , G11C2013/0054
Abstract: A read reference circuit for a sense amplifier within a chalcogenide memory device is disclosed. The read reference circuit provides a reference voltage level to the sense amplifier for distinguishing between a logical “0” state and a logical “1” state within a chalcogenide memory cell. In conjunction with a precharge circuit, the read reference circuit generates a selectable read reference current to the sense amplifier in order to detect the logical state of the chalcogenide memory cell. The precharge circuit precharges the bitlines of the chalcogenide memory cell before the sense amplifier detects the logical state of the chalcogenide memory cell.
Abstract translation: 公开了一种用于硫族化物存储器件内的读出放大器的读取参考电路。 读取参考电路向读出放大器提供参考电压电平，用于区分硫属化物存储单元内的逻辑“0”状态和逻辑“1”状态。 结合预充电电路，读取的参考电路产生可读的读取参考电流到读出放大器，以便检测硫族化物存储单元的逻辑状态。 预充电电路在读出放大器检测到硫族化物存储单元的逻辑状态之前对硫族化物存储单元的位线进行预充电。
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Patent Agency Ranking
6.发明授权Read reference circuit for a sense amplifier within a chalcogenide memory device 有权读取硫属化物存储器件内的读出放大器的参考电路公开(公告)号：US07916527B2
公开(公告)日：2011-03-29
申请号：US12525482
申请日：2008-11-26
Applicant: Bin Li , Adam Matthew Bumgarner , Daniel Pirkl
Inventor： Bin Li , Adam Matthew Bumgarner , Daniel Pirkl
IPC: G11C11/00
CPC classification number: G11C7/14 , G11C7/12 , G11C13/0004 , G11C13/0026 , G11C13/004 , G11C2013/0054
Abstract: A read reference circuit for a sense amplifier within a chalcogenide memory device is disclosed. The read reference circuit provides a reference voltage level to the sense amplifier for distinguishing between a logical “0” state and a logical “1” state within a chalcogenide memory cell. In conjunction with a precharge circuit, the read reference circuit generates a selectable read reference current to the sense amplifier in order to detect the logical state of the chalcogenide memory cell. The precharge circuit precharges the bitlines of the chalcogenide memory cell before the sense amplifier detects the logical state of the chalcogenide memory cell.
Abstract translation: 公开了一种用于硫族化物存储器件内的读出放大器的读取参考电路。 读取参考电路向读出放大器提供参考电压电平，用于区分硫属化物存储单元内的逻辑“0”状态和逻辑“1”状态。 结合预充电电路，读取的参考电路产生可读的读取参考电流到读出放大器，以便检测硫族化物存储单元的逻辑状态。 预充电电路在读出放大器检测到硫族化物存储单元的逻辑状态之前对硫族化物存储单元的位线进行预充电。
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公开(公告)号：USD1026346S1
公开(公告)日：2024-05-07
申请号：US29863779
申请日：2022-12-22
Applicant: Bin Li
Designer： Bin Li
Abstract: FIG. 1 is a front, right and top perspective view of a pet feeder, showing my new design;
FIG. 2 is a rear, left and bottom perspective view thereof;
FIG. 3 is a front view thereof;
FIG. 4 is a rear view thereof;
FIG. 5 is a left side view thereof;
FIG. 6 is a right side view thereof;
FIG. 7 is a top plan view thereof; and,
FIG. 8 is a bottom plan view thereof.-
公开(公告)号：US20220326999A1
公开(公告)日：2022-10-13
申请号：US17853564
申请日：2022-06-29
Applicant: Drew Penney , Bin Li , Tsung-Yuan Tai , Anna Drewek-Ossowicka , Rameshkumar Illikkal , Andrew J. Herdrich , Jaroslaw Sydir
Inventor： Drew Penney , Bin Li , Tsung-Yuan Tai , Anna Drewek-Ossowicka , Rameshkumar Illikkal , Andrew J. Herdrich , Jaroslaw Sydir
IPC: G06F9/50
Abstract: Apparatuses, methods, and systems for dynamic resource allocation based on quality-of-service prediction are disclosed. In embodiments, an apparatus includes quality-of-service prediction circuitry and a resource controller. The quality-of-service prediction circuitry is to make quality-of-service predictions using a model based at least in part on at least one performance counter measurements and at least one quality-of-service measurement. The resource controller is to allocate one or more shared resources based on the quality-of-service predictions and architectural performance counter measurements.
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公开(公告)号：US20220125226A1
公开(公告)日：2022-04-28
申请号：US17083218
申请日：2020-10-28
Applicant: Bin Li
Inventor： Bin Li
Abstract: This utility model released one kind of multifunctional flexibly transformable cup, comprising one internally cut-through transformable cup and a nested bottom plug that is sealed and clamped with the transformable cup body. The above-mentioned transformable cup is comprised of a foldable enclosure and pin that are successively cut-through and flexibly and tightly connected. The aforesaid seal clamp for embedded bottom plug is located at the junction between the foldable enclosure and pin. When the multifunctional flexibly transformable cup of the utility model is in use, the folding enclosure body can be overturned freely, and the whole body is made of food-grade flexible silica gel material, which is safe and reliable and not easy to be broken. It can also be used as the wine cup, bottle stopper and the bottleneck inserted into the wine bottle that can be directly used for drainage of fluid, with complete functions.
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