公开(公告)号：US07407847B2

公开(公告)日：2008-08-05

申请号：US11395860

申请日：2006-03-31

申请人： Brian S Doyle ,  Titash Rakshit ,  Robert S Chau ,  Suman Datta ,  Justin K Brask ,  Uday Shah

发明人： Brian S Doyle ,  Titash Rakshit ,  Robert S Chau ,  Suman Datta ,  Justin K Brask ,  Uday Shah

IPC分类号： H01L21/84

CPC分类号： H01L29/7853 ,  H01L29/66818

摘要： A multi-body thickness (MBT) field effect transistor (FET) comprises a silicon body formed on a substrate. The silicon body may comprise a wide section and a narrow section between the wide section and the substrate. The silicon body may comprise more than one pair of a wide section and a narrow section, each pair being located at a different height of the silicon body. The silicon body is surrounded by a gate material on three sides. The substrate may be a bulk silicon substrate or a silicon-on-insulator (SOI) substrate. The MBT-FET combines the advantages of a wide fin device and a narrow fin device.

摘要翻译： 多体厚度（MBT）场效应晶体管（FET）包括形成在衬底上的硅体。 硅体可以包括在宽部分和基底之间的宽的部分和窄的部分。 硅体可以包括多于一对宽的部分和窄的部分，每对位于硅体的不同高度处。 硅体由三面的栅极材料包围。 衬底可以是体硅衬底或绝缘体上硅（SOI）衬底。 MBT-FET结合了宽鳍片器件和窄鳍片器件的优点。

公开(公告)号：US08722478B2

公开(公告)日：2014-05-13

申请号：US12885071

申请日：2010-09-17

申请人： Been-Yin Jin ,  Brian S Doyle ,  Jack T Kavalieros ,  Robert S Chau

发明人： Been-Yin Jin ,  Brian S Doyle ,  Jack T Kavalieros ,  Robert S Chau

IPC分类号： H01L21/00 ,  H01L29/78 ,  H01L29/66 ,  H01L21/8238

CPC分类号： H01L21/02381 ,  B82Y10/00 ,  H01L21/02164 ,  H01L21/02236 ,  H01L21/0245 ,  H01L21/02507 ,  H01L21/02532 ,  H01L21/02603 ,  H01L21/30604 ,  H01L21/31658 ,  H01L21/76283 ,  H01L21/823807 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/068 ,  H01L29/1054 ,  H01L29/165 ,  H01L29/42324 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/66795 ,  H01L29/66818 ,  H01L29/775 ,  H01L29/785 ,  H01L29/78696

摘要： A method to provide a transistor or memory cell structure. The method comprises: providing a substrate including a lower Si substrate and an insulating layer on the substrate; providing a first projection extending above the insulating layer, the first projection including an Si material and a Si1-xGex material; and exposing the first projection to preferential oxidation to yield a second projection including a center region comprising Ge/Si1-yGey and a covering region comprising SiO2 and enclosing the center region.

摘要翻译： 一种提供晶体管或存储单元结构的方法。 该方法包括：在衬底上提供包括下Si衬底和绝缘层的衬底; 提供在所述绝缘层上方延伸的第一突起，所述第一突起包括Si材料和Si1-xGex材料; 以及将所述第一突起暴露于优先氧化以产生包括包含Ge / Si1-yGey的中心区域和包含SiO 2并包围所述中心区域的覆盖区域的第二突起。

公开(公告)号：US09934976B2

公开(公告)日：2018-04-03

申请号：US12317180

申请日：2008-12-18

申请人： Niloy Mukherjee ,  Matt Metz ,  Gilbert Dewey ,  Jack Kavalieros ,  Robert S Chau

发明人： Niloy Mukherjee ,  Matt Metz ,  Gilbert Dewey ,  Jack Kavalieros ,  Robert S Chau

IPC分类号： H01L21/285 ,  H01L21/768

CPC分类号： H01L21/28518 ,  H01L21/76814

摘要： Methods and associated structures of forming a microelectronic device are described. Those methods may include forming a contact opening in an inter layer dielectric (ILD) disposed on a substrate, wherein a source/drain contact area is exposed, forming a rare earth metal layer on the source/drain contact area, forming a transition metal layer on the rare earth metal layer; and annealing the rare earth metal layer and the transition metal layer to form a metal silicide stack structure.

公开(公告)号：US6153480A

公开(公告)日：2000-11-28

申请号：US164112

申请日：1998-09-30

申请人： Reza Arghavani ,  Robert S Chau ,  Binny Arcot

发明人： Reza Arghavani ,  Robert S Chau ,  Binny Arcot

IPC分类号： H01L21/762 ,  H01L21/336 ,  H01L21/76

CPC分类号： H01L21/76235

摘要： A method of forming an isolation structure in a semiconductor substrate is described. A trench is first etched into a semiconductor substrate. The trench is subjected to a nitrogen-oxide gas ambient and is annealed to form a silicon-oxynitride surface along the trench sidewalls. A first oxide layer is then formed within the trench. The first oxide layer is subjected to a nitridation step and is annealed to form an oxy-nitride surface on the first oxide layer and a silicon-oxynitride interface between the first oxide layer and the semiconductor substrate. A second oxide layer is then deposited over the oxy-nitride surface of the first oxide layer. The method and isolation structure of the present invention reduce dopant outdiffusion, reduce trench stresses, allow more uniform growth of thin gate oxides, and permit the use of thinner gate oxides.

摘要翻译： 描述在半导体衬底中形成隔离结构的方法。 首先将沟槽蚀刻到半导体衬底中。 将沟槽经受氮氧化物气体环境并退火以形成沿沟槽侧壁的氧氮化硅表面。 然后在沟槽内形成第一氧化物层。 对第一氧化物层进行氮化步骤，并在第一氧化物层和第一氧化物层与半导体衬底之间的氧氮化物界面上进行退火以形成氧氮化物表面。 然后将第二氧化物层沉积在第一氧化物层的氧化氮化物表面上。 本发明的方法和隔离结构减少掺杂剂扩散，减小沟槽应力，允许薄栅氧化物的更均匀生长，并允许使用更薄的栅极氧化物。