公开(公告)号：US09031388B2

公开(公告)日：2015-05-12

申请号：US13947381

申请日：2013-07-22

Applicant: Broadcom Corporation

Inventor： Jason Demas ,  Marcus Kellerman ,  Francis Cheung ,  Sherman (Xuemin) Chen

IPC: H04N5/781 ,  H04N5/76 ,  H04N5/915 ,  H04N9/87 ,  H04N7/24 ,  H04N21/4147 ,  H04N21/426 ,  H04N21/43 ,  H04N21/433 ,  H04N21/438 ,  H04N21/44

CPC classification number: H04N9/87 ,  H04N7/24 ,  H04N21/4147 ,  H04N21/42661 ,  H04N21/42692 ,  H04N21/4305 ,  H04N21/4333 ,  H04N21/4334 ,  H04N21/4384 ,  H04N21/44004

Abstract: Methods and apparatus for switching between a live video decoding and a recorded playback in a digital video and recording system. A received video data stream is transmitted to a first-in first-out video decoder buffer without first looping the video data stream through a playback buffer. The video data stream is transmitted from the video decoder buffer to a video decoder. If a “pause” command is received, the video data stream is transmitted to a first-in first-out playback buffer, while continuing to transmit the video data stream to the video decoder buffer. Transmission of the video data stream to the video decoder buffer is halted when the video decoder buffer fills up. The last byte of the video data stream that was transmitted to the video decoder buffer is marked. If a “play” command is received, the video data stored in the video decoder buffer is transmitted to the video decoder. The video data stored in the playback buffer is transmitted to the video decoder buffer starting at a point immediately after the data element that was marked previously.

Abstract translation: 用于在实时视频解码和数字视频和记录系统中的记录回放之间进行切换的方法和装置。 接收到的视频数据流被发送到先进先出的视频解码器缓冲器，而不用先通过重放缓冲器循环视频数据流。 视频数据流从视频解码器缓冲器发送到视频解码器。 如果接收到“暂停”命令，则将视频数据流发送到先进先出播放缓冲器，同时继续将视频数据流发送到视频解码器缓冲器。 当视频解码器缓冲器填满时，将视频数据流传输到视频解码器缓冲器。 发送到视频解码器缓冲器的视频数据流的最后一个字节被标记。 如果接收到“播放”命令，则将存储在视频解码器缓冲器中的视频数据发送到视频解码器。 存储在回放缓冲器中的视频数据从紧接在之前标记的数据元素之后的点开始被发送到视频解码器缓冲器。

公开(公告)号：US20130308927A1

公开(公告)日：2013-11-21

申请号：US13947381

申请日：2013-07-22

Applicant: Broadcom Corporation

Inventor： Jason Demas ,  Marcus Kellerman ,  Francis Cheung ,  Sherman (Xuemin) Chen

IPC: H04N9/87

CPC classification number: H04N9/87 ,  H04N7/24 ,  H04N21/4147 ,  H04N21/42661 ,  H04N21/42692 ,  H04N21/4305 ,  H04N21/4333 ,  H04N21/4334 ,  H04N21/4384 ,  H04N21/44004

Abstract: Methods and apparatus for switching between a live video decoding and a recorded playback in a digital video and recording system. A received video data stream is transmitted to a first-in first-out video decoder buffer without first looping the video data stream through a playback buffer. The video data stream is transmitted from the video decoder buffer to a video decoder. If a “pause” command is received, the video data stream is transmitted to a first-in first-out playback buffer, while continuing to transmit the video data stream to the video decoder buffer. Transmission of the video data stream to the video decoder buffer is halted when the video decoder buffer fills up. The last byte of the video data stream that was transmitted to the video decoder buffer is marked. If a “play” command is received, the video data stored in the video decoder buffer is transmitted to the video decoder. The video data stored in the playback buffer is transmitted to the video decoder buffer starting at a point immediately after the data element that was marked previously.

Abstract translation: 用于在实时视频解码和数字视频和记录系统中的记录回放之间进行切换的方法和装置。 接收到的视频数据流被发送到先进先出的视频解码器缓冲器，而不用先通过重放缓冲器循环视频数据流。 视频数据流从视频解码器缓冲器发送到视频解码器。 如果接收到“暂停”命令，则将视频数据流发送到先进先出播放缓冲器，同时继续将视频数据流发送到视频解码器缓冲器。 当视频解码器缓冲器填满时，将视频数据流传输到视频解码器缓冲器。 发送到视频解码器缓冲器的视频数据流的最后一个字节被标记。 如果接收到“播放”命令，则将存储在视频解码器缓冲器中的视频数据发送到视频解码器。 存储在回放缓冲器中的视频数据从紧接在之前标记的数据元素之后的点开始被发送到视频解码器缓冲器。

公开(公告)号：US20140181985A1

公开(公告)日：2014-06-26

申请号：US13724435

申请日：2012-12-21

Applicant: BROADCOM CORPORATION

Inventor： Rajesh Shankarrao Mamidwar ,  Francis Cheung

IPC: G06F21/64

CPC classification number: G06F21/10

Abstract: An electronic device may include multiple modules that share access to a common memory. The electronic device may include content access logic that selective allows a module to access target data in the memory. When writing data into the memory, the content access logic may determine an access restriction associated with the write data, where the access restriction specifies one or more modules that can access the write data. The content access logic may scramble the write date using an access key, and configure the access key such that only authorized modules can use the access key when retrieving data from the memory. The content access logic may then store the scrambled data in the memory.

Abstract translation: 电子设备可以包括共享对公共存储器的访问的多个模块。 电子设备可以包括内容访问逻辑，其选择性地允许模块访问存储器中的目标数据。 当将数据写入存储器时，内容访问逻辑可以确定与写入数据相关联的访问限制，其中访问限制指定可访问写入数据的一个或多个模块。 内容访问逻辑可以使用访问密钥来加密写入日期，并且配置访问密钥，使得只有经授权的模块才能在从存储器检索数据时使用访问密钥。 然后，内容访问逻辑可以将加扰的数据存储在存储器中。