Quadrature correction method for analog television reception using direct-conversion tuners
    1.
    发明申请
    Quadrature correction method for analog television reception using direct-conversion tuners 有权
    使用直接转换调谐器的模拟电视接收的正交校正方法

    公开(公告)号:US20040235443A1

    公开(公告)日:2004-11-25

    申请号:US10441057

    申请日:2003-05-20

    Inventor: Ramon A. Gomez

    CPC classification number: H03D3/009

    Abstract: A direct conversion radio frequency (RF) tuner includes a mixer generating I and Q quadrature components. A phase detection circuit generates a phase error measurement between the I quadrature component and the Q quadrature component. A phase correction circuit corrects a phase of the Q component based on the phase error measurement, and outputs a phase-corrected Q quadrature component. An I quadrature component gain control circuit receives the I quadrature component and outputting an amplitude corrected I quadrature component. A Q quadrature component gain control circuit receives the phase corrected Q quadrature component and outputs an amplitude corrected Q quadrature component.

    Abstract translation: 直接转换射频(RF)调谐器包括产生I和Q正交分量的混频器。 相位检测电路在I正交分量和Q正交分量之间产生相位误差测量。 相位校正电路根据相位误差测量校正Q分量的相位,并输出相位校正后的Q正交分量。 I正交分量增益控制电路接收I正交分量并输出振幅校正后的I正交分量。 Q正交分量增益控制电路接收相位校正的Q正交分量并输出振幅校正的Q正交分量。

    Process monitor for monitoring an integrated circuit chip
    2.
    发明申请
    Process monitor for monitoring an integrated circuit chip 有权
    用于监控集成电路芯片的过程监视器

    公开(公告)号:US20040108866A1

    公开(公告)日:2004-06-10

    申请号:US10647472

    申请日:2003-08-26

    Abstract: A system or apparatus for monitoring an Integrated Circuit (IC) chip includes: a sense circuit at least partially constructed on the IC chip and configured to produce one or more sense signals each indicative of a corresponding process-dependent circuit parameter of the IC chip; and a digitizer module configured to produce, responsive to the one or more sense signals, one or more digitized signals each representative of a corresponding one of the sense signals. A controller is configured to determine a value of one or more of the process-dependent circuit parameters based on one or more of the digitized signals.

    Abstract translation: 用于监控集成电路(IC)芯片的系统或装置包括:感测电路,至少部分地构造在IC芯片上并被配置为产生一个或多个感测信号,每个感测信号指示IC芯片的相应的与处理有关的电路参数; 以及数字转换器模块,被配置为响应于所述一个或多个感测信号产生一个或多个数字化信号,每一个表示所述感测信号中相应的一个感测信号。 控制器被配置为基于一个或多个数字化信号来确定一个或多个处理相关电路参数的值。

    Compact bandpass filter for double conversion tuner
    4.
    发明申请
    Compact bandpass filter for double conversion tuner 有权
    紧凑型带通滤波器,用于双转换调谐器

    公开(公告)号:US20030128084A1

    公开(公告)日:2003-07-10

    申请号:US10295985

    申请日:2002-11-18

    CPC classification number: H01P7/00 H01P1/20 H01P1/203 H01P1/20381 H05K1/165

    Abstract: A bandpass filter includes a plurality of resonators on a printed circuit board. An input pin is connected to a first resonator of the plurality of resonators. An output pin is connected to a second resonator of the plurality of resonators. The first and second resonators are magnetically coupled to each other. The first and second resonators are coupled to other resonators using mixed coupling. The other resonators are coupled to each other using electric coupling.

    Abstract translation: 带通滤波器包括在印刷电路板上的多个谐振器。 输入引脚连接到多个谐振器的第一谐振器。 输出引脚连接到多个谐振器的第二谐振器。 第一和第二谐振器彼此磁耦合。 第一和第二谐振器使用混合耦合耦合到其它谐振器。 其他谐振器使用电耦合彼此耦合。

    Multiple layer inductor and method of making the same
    5.
    发明申请
    Multiple layer inductor and method of making the same 有权
    多层电感及其制作方法

    公开(公告)号:US20030076210A1

    公开(公告)日:2003-04-24

    申请号:US09981993

    申请日:2001-10-19

    CPC classification number: H01F17/0013 H01F27/362

    Abstract: A multiple layer inductor has a first spiral conductive pattern disposed on a first surface; a second spiral conductive pattern disposed on a second surface; a continuing interconnection coupled to the first and second spiral conductive patterns; an interface coupled to the first and second spiral conductive patterns; and a conductive shield pattern disposed on a third surface that is adjacent to the second surface. The interface includes a first terminal disposed on the first surface that is coupled to the first spiral conductive pattern. The interface also includes a second terminal that is disposed on the first surface and coupled to said second spiral conductive pattern.

    Abstract translation: 多层电感器具有设置在第一表面上的第一螺旋导电图案; 设置在第二表面上的第二螺旋导电图案; 耦合到所述第一和第二螺旋导电图案的连续互连; 耦合到第一和第二螺旋导电图案的界面; 以及设置在与第二表面相邻的第三表面上的导电屏蔽图案。 接口包括设置在第一表面上的第一端子,该第一端子耦合到第一螺旋导电图案。 该界面还包括第二端子,该第二端子设置在第一表面上并且耦合到所述第二螺旋导电图案。

    APPARATUS AND METHOD FOR REDUCING PHASE NOISE IN OSCILLATOR CIRCUITS
    6.
    发明申请
    APPARATUS AND METHOD FOR REDUCING PHASE NOISE IN OSCILLATOR CIRCUITS 有权
    在振荡器电路中减少相位噪声的装置和方法

    公开(公告)号:US20020135431A1

    公开(公告)日:2002-09-26

    申请号:US09783033

    申请日:2001-02-15

    Inventor: Ramon A. Gomez

    CPC classification number: H03B5/364

    Abstract: A resonant oscillator circuit includes an active device and a resonator that causes the active device to oscillate at a resonant frequency of the resonator. The active device includes one or more transistors that are DC biased using one or more resistors. The bias resistors generate thermal noise that is proportional to the resistance value. An external inductor circuit is connected across the output terminals of the active device and in parallel with the resonator. The external inductor circuit shorts-out at least some of the thermal noise that is generated by the bias resistors, and thereby reduces the overall phase noise of the resonant oscillator.

    Abstract translation: 谐振振荡器电路包括有源器件和谐振器,其使得有源器件以谐振器的谐振频率振荡。 有源器件包括使用一个或多个电阻器直流偏置的一个或多个晶体管。 偏置电阻产生与电阻值成比例的热噪声。 外部电感电路连接在有源器件的输出端上并与谐振器并联。 外部电感器电路将由偏置电阻产生的至少一些热噪声短路,从而降低谐振振荡器的整体相位噪声。

    Process monitor for monitoring an integrated circuit chip
    7.
    发明申请
    Process monitor for monitoring an integrated circuit chip 有权
    用于监控集成电路芯片的过程监视器

    公开(公告)号:US20040104740A1

    公开(公告)日:2004-06-03

    申请号:US10440311

    申请日:2003-05-19

    Abstract: A system or apparatus for monitoring an Integrated Circuit (IC) chip, comprises: a sense circuit at least partially constructed on the IC chip and configured to produce one or more sense signals each indicative of a corresponding process-dependent circuit parameter of the IC chip; and a digitizer module configured to produce, responsive to the one or more sense signals, one or more digitized signals each representative of a corresponding one of the sense signals. A controller is configured to determine a value of one or more of the process-dependent circuit parameters based on one or more of the digitized signals.

    Abstract translation: 一种用于监视集成电路(IC)芯片的系统或装置,包括:感测电路,其至少部分地构造在所述IC芯片上并且被配置为产生一个或多个感测信号,每个感测信号指示所述IC芯片的相应的与处理有关的电路参数 ; 以及数字转换器模块,被配置为响应于所述一个或多个感测信号产生一个或多个数字化信号,每一个表示所述感测信号中相应的一个感测信号。 控制器被配置为基于一个或多个数字化信号来确定一个或多个处理相关电路参数的值。

    Double-conversion television tuner using a delta-sigma fractional-N PLL
    8.
    发明申请
    Double-conversion television tuner using a delta-sigma fractional-N PLL 失效
    使用Δ-sigma分数N PLL的双转换电视调谐器

    公开(公告)号:US20030224748A1

    公开(公告)日:2003-12-04

    申请号:US10366668

    申请日:2003-02-14

    CPC classification number: H03L7/185 H03D7/161 H03L7/07 H03L7/10 H03L7/1976

    Abstract: A double-conversion tuner receives an RF signal having a number of channels and down-converts a selected channel from the plurality of channels. The double-conversion tuner includes a first mixer configured to up-convert the RF signal to a first IF signal using a first local oscillator signal. A first local oscillator includes a delta-sigma fractional-N phase lock loop to produce the first local oscillator signal. The delta-sigma fractional-N phase lock loop is configured to perform fine-tuning of the first local oscillator signal and to have a wide tuning range sufficient to cover the number of channels. A bandpass filter is configured to select a subset of channels from said first IF signal. A second mixer is configured to down-convert the subset of channels to a second IF signal using a second local oscillator signal. A second local oscillator generates the second local oscillator signal. The second local oscillator is configured to perform coarse frequency tuning of the second local oscillator signal and has a narrow tuning range relative to said first local oscillator. The delta-sigma fractional-N phase lock loop in the first local oscillator permits implementation of a double-conversion tuner with improved phase noise for a given amount of power and complexity.

    Abstract translation: 双转换调谐器接收具有多个信道的RF信号并且从多个信道中对所选择的信道进行下变频。 双转换调谐器包括配置为使用第一本地振荡器信号将RF信号上变频到第一IF信号的第一混频器。 第一本地振荡器包括Δ-sigma分数N相位锁相环以产生第一本地振荡器信号。 Δ-Σ分数N相锁定环路被配置为执行第一本地振荡器信号的微调并且具有足以覆盖通道数量的宽调谐范围。 带通滤波器被配置为从所述第一IF信号中选择信道的子集。 第二混频器被配置为使用第二本地振荡器信号将信道子集降频转换为第二IF信号。 第二本地振荡器产生第二本地振荡器信号。 第二本地振荡器被配置为执行第二本地振荡器信号的粗调频调谐,并且相对于所述第一本地振荡器具有窄的调谐范围。 第一本地振荡器中的delta-sigma分数N相锁定环允许在给定量的功率和复杂度的情况下实现具有改进的相位噪声的双转换调谐器。

    Printed bandpass filter for a double conversion tuner
    9.
    发明申请
    Printed bandpass filter for a double conversion tuner 失效
    双转换调谐器的带通滤波器

    公开(公告)号:US20030128085A1

    公开(公告)日:2003-07-10

    申请号:US10040376

    申请日:2002-01-09

    CPC classification number: H01P7/00 H01P1/20 H01P1/203 H01P1/20381 H05K1/165

    Abstract: A printed bandpass filter is mounted on a precision substrate to eliminate the need for post-fabrication tuning. The filter input is capacitively coupled to a series of quarter wavelength resonators and the filter output. The quarter wavelength resonators are printed as spirals to reduce filter size. The resonators define the bandpass characteristics of the filter. The filter also weakly couples the input signal to the filter output in a manner to cancel the signal image. Mechanical clips mitigate thermal stress on solder connections when the precision substrate mounted on a second printed circuit board.

    Abstract translation: 印刷的带通滤波器安装在精密基板上,以消除对制造后调谐的需要。 滤波器输入电容耦合到一系列四分之一波长谐振器和滤波器输出。 四分之一波长谐振器被打印为螺旋线以减小滤波器尺寸。 谐振器定义滤波器的带通特性。 滤波器也以以消除信号图像的方式将输入信号弱耦合到滤波器输出。 当安装在第二印刷电路板上的精密基板时,机械夹可减轻焊接连接处的热应力。

    Apparatus and method for reducing phase noise in oscillator circuits

    公开(公告)号:US20020180537A1

    公开(公告)日:2002-12-05

    申请号:US10199113

    申请日:2002-07-22

    Inventor: Ramon A. Gomez

    CPC classification number: H03B5/364

    Abstract: A resonant oscillator circuit includes an active device and a resonator that causes the active device to oscillate at a resonant frequency of the resonator. The active device includes one or more transistors that are DC biased using one or more resistors. The bias resistors generate thermal noise that is proportional to the resistance value. An external inductor circuit is connected across the output terminals of the active device and in parallel with the resonator. The external inductor circuit shorts-out at least some of the thermal noise that is generated by the bias resistors, and thereby reduces the overall phase noise of the resonant oscillator.

Patent Agency Ranking