公开(公告)号：US11984813B2

公开(公告)日：2024-05-14

申请号：US17435789

申请日：2020-05-15

Applicant: SOUTHEAST UNIVERSITY ,  CSMC TECHNOLOGIES FAB2 CO., LTD.

Inventor： Shen Xu ,  Siyu Zhao ,  Congming Qi ,  Sen Zhang ,  Xiaoyu Shi ,  Weifeng Sun ,  Longxing Shi

IPC: H02M3/335 ,  H02M1/00 ,  H02M1/38

CPC classification number: H02M3/33592 ,  H02M1/0058 ,  H02M1/38

Abstract: A synchronous rectification control system and method for a quasi-resonant flyback converter are provided. The control system includes a switching transistor voltage sampling circuit configured to sample an output terminal voltage of the switching transistor to obtain a sampled voltage of the switching transistor; a sampling calculation module configured to obtain a dead-time based on the sampled voltage of the switching transistor and a preset relationship, the preset relationship being a correspondence between the duration of the sampled voltage of the switching transistor being below a first preset value and the dead-time during an on-time of a switching cycle of the switching transistor, the dead-time being a time from when the switching transistor is turned off to when the synchronous rectification transistor is turned on; and a control module configured to receive the dead-time and control switching of the synchronous rectification transistor based on the dead-time.

公开(公告)号：US11056402B2

公开(公告)日：2021-07-06

申请号：US16643170

申请日：2018-08-31

Applicant: CSMC TECHNOLOGIES FAB2 CO., LTD.

Inventor： Lihui Gu ,  Sen Zhang ,  Congming Qi

IPC: H01L21/8234 ,  H01L29/76 ,  H01L21/8249 ,  H01L27/06 ,  H01L29/739 ,  H01L29/78 ,  H01L27/02

Abstract: An integrated circuit chip and a manufacturing method therefor, and a gate drive circuit, the integrated circuit chip comprising: a semiconductor substrate (103), a high voltage island (101a) being formed in the semiconductor substrate (103); a high voltage junction terminal (102a), the high voltage junction terminal (102a) surrounding the high voltage island (101a), a depletion type MOS device (N1) being formed on the high voltage junction terminal (102a), a gate electrode and a drain electrode of the depletion type MOS device (N1) being short connected, and a source electrode of the depletion type MOS device (N1) being connected to a high side power supply end (VB) of the integrated circuit chip; and a bipolar transistor (Q1), a collector electrode of the bipolar transistor (Q1) being short connected to the substrate and being connected to a low side power supply end (VCC) of the integrated circuit chip, an emitter of the bipolar transistor (Q1) being connected to a gate electrode of the depletion type MOS device (N1).