公开(公告)号：US10936776B1

公开(公告)日：2021-03-02

申请号：US16834777

申请日：2020-03-30

Applicant: Cadence Design Systems, Inc.

Inventor： Chien-Liang Lin ,  Thamara Karen Cunha Andrade ,  Ronalu Augusta Nunes Barcelos ,  Gabriel Peres Nobre ,  Igor Tiradentes Murta ,  Vitor Machado Guilherme Barros ,  Rafael Sales Medina Ferreira ,  Marcos Augusto de Goes

IPC: G06F30/33 ,  G06F30/333 ,  G06F9/30 ,  G06F8/71 ,  G06F30/20

Abstract: Various embodiments provide for analyzing (e.g., debugging) waveform data generated for a simulated circuit design, which can be used as part of electronic design automation (EDA). For example, where a user modifies a circuit design in a manner that impacts a next simulation run performed on the circuit design, various embodiments perform the next simulation run only on one or more portions of the circuit design affected by the user's modifications, while the results/simulated values for the rest of the circuit design are kept or reused.