公开(公告)号：US10705984B1

公开(公告)日：2020-07-07

申请号：US16143123

申请日：2018-09-26

Applicant: Cadence Design Systems, Inc.

Inventor： H Md Shuaeb Fazeel ,  Nikhil Sawarkar ,  Aaron Willey ,  Thomas Evan Wilson

IPC: G06F13/16 ,  H03F3/45 ,  G06F30/30

Abstract: Embodiments relate to systems, methods, and computer-readable media to enable design and creation of receiver circuitry. One embodiment is a receiver apparatus comprising a plurality of receiver arrangements, each receiver arrangement having a sampling circuit and a multi-stage differential amplifier connected to the sampling circuit. Each receiver arrangement is configurable via switches between an amplifying mode and an autozero mode. Control circuitry may select output data from a sampling circuit of one or more receiver arrangements that are not in autozero mode. In various embodiments, settings for individual receiver arrangements may be set based on decision feedback equalization (DFE).

公开(公告)号：US10545889B1

公开(公告)日：2020-01-28

申请号：US16215603

申请日：2018-12-10

Applicant: Cadence Design Systems, Inc.

Inventor： H Md Shuaeb Fazeel ,  Nikhil Sawarkar ,  Aaron Willey ,  Thomas Evan Wilson

IPC: G11C11/4093 ,  G06F13/16 ,  G06F17/50 ,  H03F3/45

Abstract: Embodiments relate to systems, methods, and computer-readable media to enable design and creation of receiver circuitry. One embodiment is a receiver apparatus comprising a plurality of receiver arrangements, each receiver arrangement having a sampling circuit and a multi-stage differential amplifier connected to the sampling circuit. Each receiver arrangement is configurable via switches between an amplifying mode and an autozero mode. Control circuitry may select output data from receiver arrangements that are not in autozero mode using multiplexer circuitry. In various embodiments, settings for individual receiver arrangements may be set based on decision feedback equalization (DFE).