Projection electron-beam lithography masks using advanced materials and membrane size
    1.
    发明授权
    Projection electron-beam lithography masks using advanced materials and membrane size 失效
    投影电子束光刻掩模采用先进的材料和膜尺寸

    公开(公告)号:US06261726B1

    公开(公告)日:2001-07-17

    申请号:US09455570

    申请日:1999-12-06

    IPC分类号: G03F900

    摘要: A stencil or scatterer mask for use with charged particle beam lithography such as projection electron-beam lithography comprises a membrane layer of a material having a Young's modulus of at least about 400 GPa and support struts supporting a surface of the membrane. The struts form and surrounding a plurality of discrete membrane areas of different aspect ratios aligned to design regions of an integrated circuit. The discrete membrane areas have different aspect ratios range from about 1:1 to about 12:1, and the discrete membrane areas have different size surface areas. The membrane is preferably silicon carbide, diamond, diamond-like carbon, amorphous carbon, carbon nitride or boron nitride. When used in scatterer masks, the ratio of discrete membrane area to membrane thickness is at least about 0.18 mm2/nm. When used in stencil masks, the ratio of discrete membrane area to membrane thickness is at least about 1.0 mm2/nm. The stencil mask is made by depositing a diamond membrane film patterned with a hardmask layer on a substrate, depositing an etch stop layer adjacent the diamond film, and forming supporting struts surrounding a plurality of discrete areas of the membrane film. The method then includes depositing a pattern over the membrane film within the discrete membrane film areas, the pattern conforming to one or more desired circuit elements, and etching the membrane film with a reactive ion etch containing oxygen to form openings in the membrane film.

    摘要翻译: 用于带电粒子束光刻(例如投影电子束光刻)的模板或散射体掩模包括具有至少约400GPa的杨氏模量的材料的膜层和支撑膜表面的支撑支柱。 支柱形成并围绕与集成电路的设计区域对准的不同纵横比的多个离散膜区域。 离散膜区域具有从约1:1至约12:1范围内的不同纵横比,并且离散膜区域具有不同尺寸的表面积。 膜优选为碳化硅,金刚石,类金刚石碳,无定形碳,碳氮化物或氮化硼。 当用于散射体掩模时,离散膜面积与膜厚度的比率至少为约0.18mm 2 / nm。 当用于模板掩模时,离散膜面积与膜厚度的比率至少为约1.0mm 2 / nm。 模板掩模通过在衬底上沉积用硬掩模层图案化的金刚石膜膜,沉积与金刚石膜相邻的蚀刻停止层,以及形成围绕膜膜的多个离散区域的支撑柱而制成。 该方法然后包括在离散膜膜区域内的膜膜上沉积图案,该图案符合一个或多个期望的电路元件,以及用包含氧的反应离子蚀刻蚀刻膜膜以在膜膜中形成开口。

    Method and apparatus for selectively programming a semiconductor device
    2.
    发明授权
    Method and apparatus for selectively programming a semiconductor device 失效
    用于选择性地编程半导体器件的方法和装置

    公开(公告)号:US06461797B1

    公开(公告)日:2002-10-08

    申请号:US09443938

    申请日:1999-11-19

    IPC分类号: G03C556

    摘要: A method of programming a conductive semiconductor device having a plurality of conductive links by selective removal of all or portions of the conductive link using photolithographic and subtractive etching. Removal of only pre-selected conductive links is accomplished by use of a programmable array shutter to expose photoresist only above the conductive links to be removed.

    摘要翻译: 一种通过使用光刻和减影蚀刻选择性去除导电链路的全部或部分来编程具有多个导电链路的导电半导体器件的方法。 通过使用可编程阵列快门来仅去除预先选择的导电链路,仅将光致抗蚀剂暴露在待除去的导电链路之上。

    Etch stop barrier for stencil mask fabrication
    4.
    发明授权
    Etch stop barrier for stencil mask fabrication 失效
    用于模板掩模制造的蚀刻阻挡层

    公开(公告)号:US06555297B1

    公开(公告)日:2003-04-29

    申请号:US09624921

    申请日:2000-07-25

    申请人: Michael J. Lercel

    发明人: Michael J. Lercel

    IPC分类号: G03C500

    CPC分类号: G03F1/20

    摘要: Methods are provided for making stencil masks from a mask substrate preferably having sequential layers of a backside hardmask, a mask substrate, a stencil pattern forming layer and preferably a frontside hardmask layer. In one method a backside protective layer is formed after a backside etch and substrate window etch to protect the stencil pattern forming layer during the stencil pattern forming layer etching process. In another method of the invention, a frontside protective layer is provided over the etched stencil pattern forming layer surface before the substrate layer etch to form a mask window. In both methods enhanced control of critical dimensions of the mask and profile control are achieved since are backside cooling of the substrate during making of the mask can be used during the mask fabrication process.

    摘要翻译: 提供了用于从掩模基板制造模板掩模的方法,优选地具有背面硬掩模,掩模基板,模板图案形成层,优选地是前侧硬掩模层的顺序层。 在一种方法中,在背面蚀刻和衬底窗口蚀刻之后形成背面保护层,以在模板图案形成层蚀刻工艺期间保护模板图案形成层。 在本发明的另一种方法中,在衬底层蚀刻之前,在蚀刻后的模版图案形成层表面上提供前保护层以形成掩模窗口。 在两种方法中,增强了对掩模和轮廓控制的关键尺寸的控制,因为在掩模制造过程中可以使用掩模制造过程中衬底的背面冷却。

    Monolithic hard pellicle
    5.
    发明授权
    Monolithic hard pellicle 失效
    单片硬膜

    公开(公告)号:US07110195B2

    公开(公告)日:2006-09-19

    申请号:US10709326

    申请日:2004-04-28

    CPC分类号: G03F1/64 G03F1/62 G03F7/70983

    摘要: A monolithic optical pellicle and method of making used to protect a photomask during photolithography processing. The monolithic optical pellicle is comprised of a pellicle plate having a recessed central portion integrally formed with a perimeter frame of the pellicle plate such that it is a one-piece optical pellicle. The monolithic optical pellicle comprises a material of sufficient rigidity to minimize distortions in and maximize durability of the pellicle when used in combination with the recessed portion having a thickness that prevents sagging thereof due to applied forces on the resultant monolithic optical pellicle. This recessed central portion is the optical pellicle portion of the present monolithic optical pellicle, while the integral perimeter frame is used to attach the monolithic optical pellicle at the desired stand-off distance to a photomask. The monolithic optical pellicle preferably comprises a material that is transparent to an exposure field at about 157 nm wavelengths.

    摘要翻译: 一种单片光学防护薄膜和用于在光刻处理期间保护光掩模的方法。 单片光学防护薄膜组件由具有与防护薄膜组件的周边框架一体形成的凹形中心部分的防护薄膜组成,使得它是一体的光学防护薄片组件。 单片光学防护薄膜组件包括足够刚度的材料,以最小化防护薄膜组件的变形并最大化耐久性的材料,当与具有防止由于所得单片光学防护薄膜组件上施加的力而下垂的凹陷部分组合时。 这个凹陷的中心部分是本单片光学防护薄膜的光学防护薄膜部分,而整体的周边框架用于以一个光掩模的所需的间隔距离连接单片光学薄膜。 单片光学防护薄膜优选包括对于约157nm波长的曝光场透明的材料。

    Method of defining and forming membrane regions in a substrate for stencil or membrane marks
    6.
    发明授权
    Method of defining and forming membrane regions in a substrate for stencil or membrane marks 有权
    在用于模板或膜标记的基底中限定和形成膜区域的方法

    公开(公告)号:US06635389B1

    公开(公告)日:2003-10-21

    申请号:US09707303

    申请日:2000-11-07

    申请人: Michael J. Lercel

    发明人: Michael J. Lercel

    IPC分类号: G03F900

    CPC分类号: G03F1/20 G03F1/22

    摘要: A method and structure for forming subfield regions includes mechanical definition of the substrate through machining or mold forming. The subfield regions are filled with a sacrificial layer before the thin membranes are deposited. Slots are mechanically machined through a substrate (the slots have dimensions of membrane subfields) and filled with a sacrificial material. The substrate is planarized. A membrane material is deposited over the substrate and patterned. The sacrificial layer is then removed. A mold can be utilized to form the slotted substrate in place of the machining operation.

    摘要翻译: 用于形成子场区域的方法和结构包括通过机械加工或模具成型的基板的机械定义。 在薄膜沉积之前,子区域填充有牺牲层。 槽通过基底机械加工(槽具有膜子区的尺寸)并填充牺牲材料。 将基板平坦化。 膜材料沉积在衬底上并被图案化。 然后去除牺牲层。 可以利用模具来形成开槽基板来代替加工操作。

    Integrated cooling substrate for extreme ultraviolet reticle
    7.
    发明授权
    Integrated cooling substrate for extreme ultraviolet reticle 失效
    用于极紫外线掩模的集成冷却基板

    公开(公告)号:US06806006B2

    公开(公告)日:2004-10-19

    申请号:US10064441

    申请日:2002-07-15

    IPC分类号: G03F900

    摘要: The current invention provides a method and apparatus that minimizes the destructive effects of non-reflected energy during lithography. More specifically, a cooling system is located within the mask. In one example, a cooling module is integrated into the EUV mask. The cooling module may be thermoelectric. The EUV mask comprises a substrate structure as a base for a reticle, a cooling layer, which is formed on the substrate structure and a planarizing layer deposited on the cooling layer. In another example, a cooling channel is formed within the mask.

    摘要翻译: 本发明提供了一种在光刻期间使无反射能量的破坏作用最小化的方法和装置。 更具体地,冷却系统位于掩模内。 在一个示例中,将冷却模块集成到EUV掩模中。 冷却模块可以是热电。 EUV掩模包括作为掩模版的基底的衬底结构,形成在衬底结构上的冷却层和沉积在冷却层上的平坦化层。 在另一示例中,在掩模内形成冷却通道。

    Substrate for diamond stencil mask and method for forming
    8.
    发明授权
    Substrate for diamond stencil mask and method for forming 失效
    金刚石模板掩模基板和成型方法

    公开(公告)号:US06528215B1

    公开(公告)日:2003-03-04

    申请号:US09707356

    申请日:2000-11-07

    申请人: Michael J. Lercel

    发明人: Michael J. Lercel

    IPC分类号: G03F900

    CPC分类号: G03F1/20

    摘要: In accordance with the present invention, a method for forming a stencil mask from a difficult to form material, such as diamond, is provided. A stencil mask formed of diamond in accordance with the present invention provides advantageous properties of heat transmission and stiffness. The method in accordance with the present invention utilizes a nucleation layer over an etch stop layer. The nucleation layer facilitates the growth of a diamond film. The etch stop layer may comprise a buried oxide layer and the nucleation layer may comprise a thin layer of silicon. The buried oxide layer provides an etch stop for use in the definition of the diamond membrane and in the etching of the diamond layer to form the stencil. The use of the buried oxide layer as an etch stop provides improved profile control of the etches.

    摘要翻译: 根据本发明,提供了一种从难以形成的材料(例如金刚石)形成模版掩模的方法。 根据本发明的由金刚石形成的模板掩模提供了传热和刚度的有利特性。 根据本发明的方法利用蚀刻停止层上的成核层。 成核层有助于金刚石膜的生长。 蚀刻停止层可以包括掩埋氧化物层,并且成核层可以包括薄的硅层。 掩埋氧化物层提供用于金刚石膜的定义和在金刚石层的蚀刻中形成模板的蚀刻停止。 使用掩埋氧化物层作为蚀刻停止层提供改进的蚀刻曲线控制。