Efficient management of queueing resources for diffserv-aware switches
    1.
    发明申请
    Efficient management of queueing resources for diffserv-aware switches 有权
    有效管理支持diffserv的交换机的排队资源

    公开(公告)号:US20070253411A1

    公开(公告)日:2007-11-01

    申请号:US11412265

    申请日:2006-04-26

    IPC分类号: H04L12/56

    摘要: Resources allocated to a group of ports include a plurality of storage regions. Each storage region includes a committed area and a shared area. A destination storage region is identified for a packet. A packet queuing engine stores the packet in the committed area of the determined destination storage region if it has a first drop precedence value, and if available storage space in the committed area exceeds a first threshold. The packet queuing engine stores the packet in the shared area of the determined destination storage region if the packet is not stored in the committed area, and if available storage space exceeds a second threshold defined by the packet's drop precedence value. If the packet is not stored either in the committed or shared area, it may be dropped.

    摘要翻译: 分配给一组端口的资源包括多个存储区域。 每个存储区域包括承诺区域和共享区域。 为分组识别目的地存储区域。 如果分组排队引擎具有第一丢弃优先级值,则分组排队引擎将所述分组存储在所确定的目的地存储区域的提交区域中,并且如果所述提交区域中的可用存储空间超过第一阈值。 如果分组未存储在提交区域中,并且如果可用存储空间超过由分组的丢弃优先级值定义的第二阈值,则分组排队引擎将分组存储在所确定的目的地存储区域的共享区域中。 如果数据包未存储在承诺或共享区域中,则可能会丢弃该数据包。

    Efficient management of queueing resources for switches
    2.
    发明授权
    Efficient management of queueing resources for switches 有权
    交换机排队资源的有效管理

    公开(公告)号:US07948976B2

    公开(公告)日:2011-05-24

    申请号:US11412265

    申请日:2006-04-26

    IPC分类号: H04L12/56 G06F5/12

    摘要: Resources allocated to a group of ports include a plurality of storage regions. Each storage region includes a committed area and a shared area. A destination storage region is identified for a packet. A packet queuing engine stores the packet in the committed area of the determined destination storage region if it has a first drop precedence value, and if available storage space in the committed area exceeds a first threshold. The packet queuing engine stores the packet in the shared area of the determined destination storage region if the packet is not stored in the committed area, and if available storage space exceeds a second threshold defined by the packet's drop precedence value. If the packet is not stored either in the committed or shared area, it may be dropped.

    摘要翻译: 分配给一组端口的资源包括多个存储区域。 每个存储区域包括承诺区域和共享区域。 为分组识别目的地存储区域。 如果分组排队引擎具有第一丢弃优先级值,则分组排队引擎将所述分组存储在所确定的目的地存储区域的提交区域中,并且如果所述提交区域中的可用存储空间超过第一阈值。 如果分组未存储在提交区域中,并且如果可用存储空间超过由分组的丢弃优先级值定义的第二阈值,则分组排队引擎将分组存储在所确定的目的地存储区域的共享区域中。 如果数据包未存储在承诺或共享区域中,则可能会丢弃该数据包。

    Enhanced tail dropping in a switch
    3.
    发明授权
    Enhanced tail dropping in a switch 有权
    增强的尾巴放在开关中

    公开(公告)号:US09112818B1

    公开(公告)日:2015-08-18

    申请号:US13022303

    申请日:2011-02-07

    IPC分类号: H04L12/54 H04L12/861

    摘要: In a method for processing packets, a storage region for a packet is determined based on a queue with which the packet is associated. The storage region includes a committed area reserved for storage of packets associated with the queue, and an area that is shared by multiple queues for packet storage. A first part of the packet is stored in the committed area, a second part is stored in the shared area, and both parts are accounted for. A network device for processing packets comprises a plurality of queues and a storage area including a committed area and a shared area. The network device further comprises a packet queuing engine configured to store a first part of a packet in the committed area, store a second part of the packet in the shared area, and account for the storage of the first and the second parts of the packet.

    摘要翻译: 在处理分组的方法中,基于分组与其相关联的队列来确定分组的存储区域。 存储区域包括保留用于存储与队列相关联的分组的保留区域以及由多个队列共享用于分组存储的区域。 分组的第一部分被存储在承诺区域中,第二部分被存储在共享区域中,并且两部分被考虑。 用于处理分组的网络设备包括多个队列和包括承诺区域和共享区域的存储区域。 网络设备还包括分组排队引擎,其被配置为在分配区域中存储分组的第一部分,将分组的第二部分存储在共享区域中,并且考虑到分组的第一和第二部分的存储 。

    Apparatus for determining locations of fields in a data unit
    4.
    发明授权
    Apparatus for determining locations of fields in a data unit 有权
    用于确定数据单元中场的位置的装置

    公开(公告)号:US07978700B2

    公开(公告)日:2011-07-12

    申请号:US12047063

    申请日:2008-03-12

    IPC分类号: H04L12/28

    CPC分类号: H04L69/22

    摘要: A header analyzer unit generates attribute information regarding headers of a data unit. The header analyzer unit includes a programmable memory unit having a content addressable memory (CAM) with an input to receive a first portion of the data unit and a second portion of the data unit. The programmable memory unit also includes a memory separate from the CAM and coupled to an output of the CAM. The CAM stores indications of locations within the memory separate from the CAM, and the memory separate from the CAM programmably stores header attribute information regarding a plurality of different types of headers for data units having different formats.

    摘要翻译: 标题分析器单元生成关于数据单元的头部的属性信息。 标题分析器单元包括具有内容可寻址存储器(CAM)的可编程存储器单元,其具有用于接收数据单元的第一部分的输入和数据单元的第二部分。 可编程存储器单元还包括与CAM分离并耦合到CAM的输出的存储器。 CAM存储与CAM分离的存储器中的位置的指示,并且与CAM分离的存储器可编程地存储关于具有不同格式的数据单元的多个不同类型的头的头部属性信息。

    METHOD AND APPARATUS FOR DETERMINING LOCATIONS OF FIELDS IN A DATA UNIT
    5.
    发明申请
    METHOD AND APPARATUS FOR DETERMINING LOCATIONS OF FIELDS IN A DATA UNIT 有权
    用于确定数据单元中字段位置的方法和装置

    公开(公告)号:US20080232374A1

    公开(公告)日:2008-09-25

    申请号:US12047063

    申请日:2008-03-12

    IPC分类号: H04L12/28

    CPC分类号: H04L69/22

    摘要: At least a portion of a data unit is provided to a programmable memory unit to identify an attribute of a field in a header of the data unit. The header is parsed in response to an output of the programmable memory unit.

    摘要翻译: 将数据单元的至少一部分提供给可编程存储器单元以识别数据单元的报头中的字段的属性。 响应于可编程存储器单元的输出来解析报头。

    Method and apparatus for determining locations of fields in a data unit
    6.
    发明授权
    Method and apparatus for determining locations of fields in a data unit 有权
    用于确定数据单元中场的位置的方法和装置

    公开(公告)号:US08571035B2

    公开(公告)日:2013-10-29

    申请号:US13180254

    申请日:2011-07-11

    IPC分类号: H04L12/28

    CPC分类号: H04L69/22

    摘要: A packet processor for processing a data unit received from a network includes a header analyzer unit configured to obtain indications of locations in a header of the data unit of one or more fields to be parsed from the data unit to perform a packet processing operation on the data unit. The header analyzer unit comprises a ternary content addressable memory (TCAM), and a memory separate from the TCAM and coupled to an output of the TCAM, wherein a content of the TCAM and a content of the memory are programmable. The header analyzer unit is configured to obtain, responsive to a lookup of at least one portion of the data unit in the TCAM, indications of locations in a header of the data unit of one or more fields to be parsed from the data unit to perform a packet processing operation on the data unit. The packet processor further comprises a parser configured to parse the header using the indications of locations of one or more fields in the header to obtain data from the one or more fields.

    摘要翻译: 用于处理从网络接收的数据单元的分组处理器包括:报头分析器单元,被配置为从数据单元获取要解析的一个或多个字段的数据单元的报头中的位置的指示,以对从该数据单元执行分组处理操作 数据单元。 标题分析器单元包括三元内容可寻址存储器(TCAM)和与TCAM分离并耦合到TCAM的输出的存储器,其中TCAM的内容和存储器的内容是可编程的。 标题分析器单元被配置为响应于TCAM中的数据单元的至少一部分的查找来获得要从数据单元解析以执行的一个或多个字段的数据单元的报头中的位置的指示 对数据单元进行分组处理操作。 分组处理器还包括解析器,其被配置为使用标题中的一个或多个字段的位置的指示来解析报头,以从一个或多个字段获得数据。

    METHOD AND APPARATUS FOR DETERMINING LOCATIONS OF FIELDS IN A DATA UNIT
    7.
    发明申请
    METHOD AND APPARATUS FOR DETERMINING LOCATIONS OF FIELDS IN A DATA UNIT 有权
    用于确定数据单元中字段位置的方法和装置

    公开(公告)号:US20110268123A1

    公开(公告)日:2011-11-03

    申请号:US13180254

    申请日:2011-07-11

    IPC分类号: H04L12/56

    CPC分类号: H04L69/22

    摘要: A packet processor for processing a data unit received from a network includes a header analyzer unit configured to obtain indications of locations in a header of the data unit of one or more fields to be parsed from the data unit to perform a packet processing operation on the data unit. The header analyzer unit comprises a ternary content addressable memory (TCAM), and a memory separate from the TCAM and coupled to an output of the TCAM, wherein a content of the TCAM and a content of the memory are programmable. The header analyzer unit is configured to obtain, responsive to a lookup of at least one portion of the data unit in the TCAM, indications of locations in a header of the data unit of one or more fields to be parsed from the data unit to perform a packet processing operation on the data unit. The packet processor further comprises a parser configured to parse the header using the indications of locations of one or more fields in the header to obtain data from the one or more fields.

    摘要翻译: 用于处理从网络接收的数据单元的分组处理器包括:报头分析器单元,被配置为从数据单元获取要解析的一个或多个字段的数据单元的报头中的位置的指示,以对从该数据单元执行分组处理操作 数据单元。 标题分析器单元包括三元内容可寻址存储器(TCAM)和与TCAM分离并耦合到TCAM的输出的存储器,其中TCAM的内容和存储器的内容是可编程的。 标题分析器单元被配置为响应于TCAM中的数据单元的至少一部分的查找来获得要从数据单元解析以执行的一个或多个字段的数据单元的报头中的位置的指示 对数据单元进行分组处理操作。 分组处理器还包括解析器,其被配置为使用标题中的一个或多个字段的位置的指示来解析报头,以从一个或多个字段获得数据。

    Apparatus for reassembling a fragmented data unit and transmitting the reassembled data unit
    8.
    发明授权
    Apparatus for reassembling a fragmented data unit and transmitting the reassembled data unit 失效
    用于重新组装分段数据单元并发送重新组装的数据单元的装置

    公开(公告)号:US08743907B1

    公开(公告)日:2014-06-03

    申请号:US12359965

    申请日:2009-01-26

    IPC分类号: H04J3/24 H04L12/28

    摘要: An apparatus includes a receive port unit, a forwarding engine, a transmit port unit, and a reassembly unit. In an embodiment, the packet reassembly unit examines headers in received fragments of a data unit and using the headers to reassemble the data unit, wherein the headers correspond to a protocol layer above an IP-layer. In another embodiment, the packet reassembly unit is located downstream from the forwarding engine in a packet forwarding pipeline, and the forwarding engine skips processing fragments received subsequent to a first received fragment.

    摘要翻译: 一种装置包括接收端口单元,转发引擎,发送端口单元和重新组装单元。 在一个实施例中,分组重组单元检查数据单元的接收分段中的报头,并使用报头重新组合数据单元,其中报头对应于IP层上方的协议层。 在另一个实施例中,分组重组单元位于分组转发流水线中的转发引擎的下游,并且转发引擎跳过在第一接收到的片段之后接收的处理片段。

    Lock phase circuit
    9.
    发明授权
    Lock phase circuit 有权
    锁相电路

    公开(公告)号:US07352217B1

    公开(公告)日:2008-04-01

    申请号:US10752818

    申请日:2004-01-06

    申请人: Aviran Kadosh

    发明人: Aviran Kadosh

    IPC分类号: H03L7/06

    CPC分类号: G01R31/31727

    摘要: Systems and techniques for producing a signal with a known phase relationship to a source clock at an output of an indeterminate circuit element such as a clock divider. The systems and techniques may be used to allow circuit test data to be accurately compared with simulation data.

    摘要翻译: 用于在诸如时钟分频器的不确定电路元件的输出处产生具有与源时钟的已知相位关系的信号的系统和技术。 这些系统和技术可以用于允许电路测试数据与仿真数据精确比较。

    Hardware interface utilizing alignment symbols for demultiplexing
    10.
    发明授权
    Hardware interface utilizing alignment symbols for demultiplexing 有权
    使用对准符号进行解复用的硬件接口

    公开(公告)号:US08401043B1

    公开(公告)日:2013-03-19

    申请号:US12621268

    申请日:2009-11-18

    IPC分类号: H04J3/04

    CPC分类号: H04J3/047

    摘要: In a data transfer interface, at least one deserializer receives a serial data stream at a first clock speed and outputs a first parallel data stream at a second clock speed. The first parallel data stream includes data symbols representing data and alignment symbols for aligning the data symbols at a downstream location. A demultiplexer demultiplexes the first parallel data stream into a plurality of second parallel data streams based on the alignment symbols.

    摘要翻译: 在数据传输接口中,至少一个解串器以第一时钟速度接收串行数据流,并以第二时钟速度输出第一并行数据流。 第一并行数据流包括表示用于在下游位置对准数据符号的数据和对准符号的数据符号。 解复用器基于对准符号将第一并行数据流解复用为多个第二并行数据流。