摘要:
Resources allocated to a group of ports include a plurality of storage regions. Each storage region includes a committed area and a shared area. A destination storage region is identified for a packet. A packet queuing engine stores the packet in the committed area of the determined destination storage region if it has a first drop precedence value, and if available storage space in the committed area exceeds a first threshold. The packet queuing engine stores the packet in the shared area of the determined destination storage region if the packet is not stored in the committed area, and if available storage space exceeds a second threshold defined by the packet's drop precedence value. If the packet is not stored either in the committed or shared area, it may be dropped.
摘要:
Resources allocated to a group of ports include a plurality of storage regions. Each storage region includes a committed area and a shared area. A destination storage region is identified for a packet. A packet queuing engine stores the packet in the committed area of the determined destination storage region if it has a first drop precedence value, and if available storage space in the committed area exceeds a first threshold. The packet queuing engine stores the packet in the shared area of the determined destination storage region if the packet is not stored in the committed area, and if available storage space exceeds a second threshold defined by the packet's drop precedence value. If the packet is not stored either in the committed or shared area, it may be dropped.
摘要:
In a method for processing packets, a storage region for a packet is determined based on a queue with which the packet is associated. The storage region includes a committed area reserved for storage of packets associated with the queue, and an area that is shared by multiple queues for packet storage. A first part of the packet is stored in the committed area, a second part is stored in the shared area, and both parts are accounted for. A network device for processing packets comprises a plurality of queues and a storage area including a committed area and a shared area. The network device further comprises a packet queuing engine configured to store a first part of a packet in the committed area, store a second part of the packet in the shared area, and account for the storage of the first and the second parts of the packet.
摘要:
A header analyzer unit generates attribute information regarding headers of a data unit. The header analyzer unit includes a programmable memory unit having a content addressable memory (CAM) with an input to receive a first portion of the data unit and a second portion of the data unit. The programmable memory unit also includes a memory separate from the CAM and coupled to an output of the CAM. The CAM stores indications of locations within the memory separate from the CAM, and the memory separate from the CAM programmably stores header attribute information regarding a plurality of different types of headers for data units having different formats.
摘要:
At least a portion of a data unit is provided to a programmable memory unit to identify an attribute of a field in a header of the data unit. The header is parsed in response to an output of the programmable memory unit.
摘要:
A packet processor for processing a data unit received from a network includes a header analyzer unit configured to obtain indications of locations in a header of the data unit of one or more fields to be parsed from the data unit to perform a packet processing operation on the data unit. The header analyzer unit comprises a ternary content addressable memory (TCAM), and a memory separate from the TCAM and coupled to an output of the TCAM, wherein a content of the TCAM and a content of the memory are programmable. The header analyzer unit is configured to obtain, responsive to a lookup of at least one portion of the data unit in the TCAM, indications of locations in a header of the data unit of one or more fields to be parsed from the data unit to perform a packet processing operation on the data unit. The packet processor further comprises a parser configured to parse the header using the indications of locations of one or more fields in the header to obtain data from the one or more fields.
摘要:
A packet processor for processing a data unit received from a network includes a header analyzer unit configured to obtain indications of locations in a header of the data unit of one or more fields to be parsed from the data unit to perform a packet processing operation on the data unit. The header analyzer unit comprises a ternary content addressable memory (TCAM), and a memory separate from the TCAM and coupled to an output of the TCAM, wherein a content of the TCAM and a content of the memory are programmable. The header analyzer unit is configured to obtain, responsive to a lookup of at least one portion of the data unit in the TCAM, indications of locations in a header of the data unit of one or more fields to be parsed from the data unit to perform a packet processing operation on the data unit. The packet processor further comprises a parser configured to parse the header using the indications of locations of one or more fields in the header to obtain data from the one or more fields.
摘要:
An apparatus includes a receive port unit, a forwarding engine, a transmit port unit, and a reassembly unit. In an embodiment, the packet reassembly unit examines headers in received fragments of a data unit and using the headers to reassemble the data unit, wherein the headers correspond to a protocol layer above an IP-layer. In another embodiment, the packet reassembly unit is located downstream from the forwarding engine in a packet forwarding pipeline, and the forwarding engine skips processing fragments received subsequent to a first received fragment.
摘要:
Systems and techniques for producing a signal with a known phase relationship to a source clock at an output of an indeterminate circuit element such as a clock divider. The systems and techniques may be used to allow circuit test data to be accurately compared with simulation data.
摘要:
In a data transfer interface, at least one deserializer receives a serial data stream at a first clock speed and outputs a first parallel data stream at a second clock speed. The first parallel data stream includes data symbols representing data and alignment symbols for aligning the data symbols at a downstream location. A demultiplexer demultiplexes the first parallel data stream into a plurality of second parallel data streams based on the alignment symbols.