公开(公告)号：US20110248376A1

公开(公告)日：2011-10-13

申请号：US13166867

申请日：2011-06-23

申请人： Chang-woo Oh ,  Dong-gun Park ,  Dong-won Kim ,  Ming Li ,  Sung-hwan Kim

发明人： Chang-woo Oh ,  Dong-gun Park ,  Dong-won Kim ,  Ming Li ,  Sung-hwan Kim

IPC分类号： H01L29/06

CPC分类号： H01L29/66833 ,  H01L21/76224 ,  H01L21/84 ,  H01L27/12 ,  H01L29/66795 ,  H01L29/785

摘要： Semiconductor devices include a semiconductor substrate with a stack structure protruding from the semiconductor substrate and surrounded by an isolation structure. The stack structure includes an active layer pattern and a gap-filling insulation layer between the semiconductor substrate and the active layer pattern. A gate electrode extends from the isolation structure around the stack structure. The gate electrode is configured to provide a support structure for the active layer pattern. The gate electrode may be a gate electrode of a silicon on insulator (SOI) device formed on the semiconductor wafer and the semiconductor device may further include a bulk silicon device formed on the semiconductor substrate in a region of the semiconductor substrate not including the gap-filing insulation layer.

摘要翻译： 半导体器件包括具有从半导体衬底突出并被隔离结构包围的堆叠结构的半导体衬底。 堆叠结构包括半导体衬底和有源层图案之间的有源层图案和间隙填充绝缘层。 栅电极围绕堆叠结构从隔离结构延伸。 栅电极被配置为提供用于有源层图案的支撑结构。 栅电极可以是形成在半导体晶片上的绝缘体上硅（SOI）器件的栅电极，并且半导体器件还可以包括在半导体衬底的形成在半导体衬底上的体积硅器件， 保护层。

公开(公告)号：US08426901B2

公开(公告)日：2013-04-23

申请号：US13166867

申请日：2011-06-23

申请人： Chang-woo Oh ,  Dong-gun Park ,  Dong-won Kim ,  Ming Li ,  Sung-hwan Kim

发明人： Chang-woo Oh ,  Dong-gun Park ,  Dong-won Kim ,  Ming Li ,  Sung-hwan Kim

IPC分类号： H01L29/76

CPC分类号： H01L29/66833 ,  H01L21/76224 ,  H01L21/84 ,  H01L27/12 ,  H01L29/66795 ,  H01L29/785

摘要： Semiconductor devices include a semiconductor substrate with a stack structure protruding from the semiconductor substrate and surrounded by an isolation structure. The stack structure includes an active layer pattern and a gap-filling insulation layer between the semiconductor substrate and the active layer pattern. A gate electrode extends from the isolation structure around the stack structure. The gate electrode is configured to provide a support structure for the active layer pattern. The gate electrode may be a gate electrode of a silicon on insulator (SOI) device formed on the semiconductor wafer and the semiconductor device may further include a bulk silicon device formed on the semiconductor substrate in a region of the semiconductor substrate not including the gap-filing insulation layer.

摘要翻译： 半导体器件包括具有从半导体衬底突出并被隔离结构包围的堆叠结构的半导体衬底。 堆叠结构包括半导体衬底和有源层图案之间的有源层图案和间隙填充绝缘层。 栅电极围绕堆叠结构从隔离结构延伸。 栅电极被配置为提供用于有源层图案的支撑结构。 栅电极可以是形成在半导体晶片上的绝缘体上硅（SOI）器件的栅电极，并且半导体器件还可以包括在半导体衬底的形成在半导体衬底上的体积硅器件， 保护层。

公开(公告)号：US07989854B2

公开(公告)日：2011-08-02

申请号：US11094623

申请日：2005-03-30

申请人： Chang-woo Oh ,  Dong-gun Park ,  Dong-won Kim ,  Ming Li ,  Sung-hwan Kim

发明人： Chang-woo Oh ,  Dong-gun Park ,  Dong-won Kim ,  Ming Li ,  Sung-hwan Kim

IPC分类号： H01L29/76

CPC分类号： H01L29/66833 ,  H01L21/76224 ,  H01L21/84 ,  H01L27/12 ,  H01L29/66795 ,  H01L29/785

摘要： Semiconductor devices include a semiconductor substrate with a stack structure protruding from the semiconductor substrate and surrounded by an isolation structure. The stack structure includes an active layer pattern and a gap-filling insulation layer between the semiconductor substrate and the active layer pattern. A gate electrode extends from the isolation structure around the stack structure. The gate electrode is configured to provide a support structure for the active layer pattern. The gate electrode may be a gate electrode of a silicon on insulator (SOI) device formed on the semiconductor wafer and the semiconductor device may further include a bulk silicon device formed on the semiconductor substrate in a region of the semiconductor substrate not including the gap-filing insulation layer.

摘要翻译： 半导体器件包括具有从半导体衬底突出并被隔离结构包围的堆叠结构的半导体衬底。 堆叠结构包括半导体衬底和有源层图案之间的有源层图案和间隙填充绝缘层。 栅电极围绕堆叠结构从隔离结构延伸。 栅电极被配置为提供用于有源层图案的支撑结构。 栅电极可以是形成在半导体晶片上的绝缘体上硅（SOI）器件的栅电极，并且半导体器件还可以包括在半导体衬底的形成在半导体衬底上的体积硅器件， 保护层。

公开(公告)号：US20060029887A1

公开(公告)日：2006-02-09

申请号：US11094623

申请日：2005-03-30

申请人： Chang-woo Oh ,  Dong-gun Park ,  Dong-won Kim ,  Ming Li ,  Sung-hwan Kim

发明人： Chang-woo Oh ,  Dong-gun Park ,  Dong-won Kim ,  Ming Li ,  Sung-hwan Kim

IPC分类号： G03F7/00

CPC分类号： H01L29/66833 ,  H01L21/76224 ,  H01L21/84 ,  H01L27/12 ,  H01L29/66795 ,  H01L29/785

摘要： Semiconductor devices include a semiconductor substrate with a stack structure protruding from the semiconductor substrate and surrounded by an isolation structure. The stack structure includes an active layer pattern and a gap-filling insulation layer between the semiconductor substrate and the active layer pattern. A gate electrode extends from the isolation structure around the stack structure. The gate electrode is configured to provide a support structure for the active layer pattern. The gate electrode may be a gate electrode of a silicon on insulator (SOI) device formed on the semiconductor wafer and the semiconductor device may further include a bulk silicon device formed on the semiconductor substrate in a region of the semiconductor substrate not including the gap-filing insulation layer.

摘要翻译： 半导体器件包括具有从半导体衬底突出并被隔离结构包围的堆叠结构的半导体衬底。 堆叠结构包括半导体衬底和有源层图案之间的有源层图案和间隙填充绝缘层。 栅电极围绕堆叠结构从隔离结构延伸。 栅电极被配置为提供用于有源层图案的支撑结构。 栅电极可以是形成在半导体晶片上的绝缘体上硅（SOI）器件的栅电极，并且半导体器件还可以包括在半导体衬底的形成在半导体衬底上的体积硅器件， 保护层。

公开(公告)号：US07332386B2

公开(公告)日：2008-02-19

申请号：US11084922

申请日：2005-03-21

申请人： Chul Lee ,  Min-Sang Kim ,  Dong-gun Park ,  Choong-ho Lee ,  Chang-woo Oh ,  Jae-man Yoon ,  Dong-won Kim ,  Jeong-dong Choe ,  Ming Li ,  Hye-jin Cho

发明人： Chul Lee ,  Min-Sang Kim ,  Dong-gun Park ,  Choong-ho Lee ,  Chang-woo Oh ,  Jae-man Yoon ,  Dong-won Kim ,  Jeong-dong Choe ,  Ming Li ,  Hye-jin Cho

IPC分类号： H01L21/336 ,  H01L21/8234 ,  H01L21/8238

CPC分类号： H01L29/785 ,  H01L21/26513 ,  H01L21/845 ,  H01L29/66795 ,  H01L29/78624

摘要： A fin field effect transistor (FinFET) includes a substrate, a fin, a gate electrode, a gate insulation layer, and source and drain regions in the fin. The fin is on and extends laterally along and vertically away from the substrate. The gate electrode covers sides and a top of a portion of the fin. The gate insulation layer is between the gate electrode and the fin. The source region and the drain region in the fin and adjacent to opposite sides of the gate electrode. The source region of the fin has a different width than the drain region of the fin.

摘要翻译： 翅片场效应晶体管（FinFET）包括衬底，鳍，栅电极，栅极绝缘层以及鳍中的源极和漏极区。 翅片在基底上并沿着和垂直方向横向延伸。 栅电极覆盖翅片的一侧和顶部。 栅绝缘层位于栅电极和鳍之间。 翅片中的源极区域和漏极区域，并且与栅电极的相对侧相邻。 翅片的源极区域具有与鳍片的漏极区域不同的宽度。

公开(公告)号：US20050269629A1

公开(公告)日：2005-12-08

申请号：US11084922

申请日：2005-03-21

申请人： Chul Lee ,  Min-Sang Kim ,  Dong-gun Park ,  Choong-ho Lee ,  Chang-woo Oh ,  Jae-man Yoon ,  Dong-won Kim ,  Jeong-dong Choe ,  Ming Li ,  Hye-jin Cho

发明人： Chul Lee ,  Min-Sang Kim ,  Dong-gun Park ,  Choong-ho Lee ,  Chang-woo Oh ,  Jae-man Yoon ,  Dong-won Kim ,  Jeong-dong Choe ,  Ming Li ,  Hye-jin Cho

IPC分类号： H01L21/00 ,  H01L21/20 ,  H01L21/265 ,  H01L21/336 ,  H01L21/84 ,  H01L29/76 ,  H01L29/786 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC分类号： H01L29/785 ,  H01L21/26513 ,  H01L21/845 ,  H01L29/66795 ,  H01L29/78624

摘要： A fin field effect transistor (FinFET) includes a substrate, a fin, a gate electrode, a gate insulation layer, and source and drain regions in the fin. The fin is on and extends laterally along and vertically away from the substrate. The gate electrode covers sides and a top of a portion of the fin. The gate insulation layer is between the gate electrode and the fin. The source region and the drain region in the fin and adjacent to opposite sides of the gate electrode. The source region of the fin has a different width than the drain region of the fin.

摘要翻译： 翅片场效应晶体管（FinFET）包括衬底，鳍，栅电极，栅极绝缘层以及鳍中的源极和漏极区。 翅片在基底上并沿着和垂直方向横向延伸。 栅电极覆盖翅片的一侧和顶部。 栅绝缘层位于栅电极和鳍之间。 翅片中的源极区域和漏极区域，并且与栅电极的相对侧相邻。 翅片的源极区域具有与鳍片的漏极区域不同的宽度。

公开(公告)号：US07361545B2

公开(公告)日：2008-04-22

申请号：US11241611

申请日：2005-09-30

申请人： Ming Li ,  Dong-Uk Choi ,  Chang-Woo Oh ,  Dong-Won Kim ,  Min-Sang Kim ,  Sung-Hwan Kim ,  Kyoung-Hwan Yeo

发明人： Ming Li ,  Dong-Uk Choi ,  Chang-Woo Oh ,  Dong-Won Kim ,  Min-Sang Kim ,  Sung-Hwan Kim ,  Kyoung-Hwan Yeo

IPC分类号： H01L21/00

CPC分类号： H01L29/7883 ,  H01L27/108 ,  H01L27/10802 ,  H01L29/42336 ,  H01L29/42392 ,  H01L29/66825 ,  H01L29/7841

摘要： A field effect transistor includes a buried gate pattern that is electrically isolated by being surrounded by a tunneling insulating film. The field effect transistor also includes a channel region that is floated by source and drain regions, a gate insulating film, and the tunneling insulating film. The buried gate pattern and the tunneling insulating film extend into the source and drain regions. Thus, the field effect transistor efficiently stores charge carriers in the buried gate pattern and the floating channel region.

摘要翻译： 场效应晶体管包括通过被隧道绝缘膜包围而电隔离的掩埋栅极图案。 场效应晶体管还包括由源极和漏极区域浮置的沟道区，栅极绝缘膜和隧道绝缘膜。 掩埋栅极图案和隧道绝缘膜延伸到源极和漏极区域。 因此，场效应晶体管有效地将电荷载流子存储在掩埋栅极图案和浮动沟道区域中。

公开(公告)号：US08680588B2

公开(公告)日：2014-03-25

申请号：US12072440

申请日：2008-02-26

申请人： Ming Li ,  Dong-Uk Choi ,  Chang-Woo Oh ,  Dong-Won Kim ,  Min-Sang Kim ,  Sung-Hwan Kim ,  Kyoung-Hwan Yeo

发明人： Ming Li ,  Dong-Uk Choi ,  Chang-Woo Oh ,  Dong-Won Kim ,  Min-Sang Kim ,  Sung-Hwan Kim ,  Kyoung-Hwan Yeo

IPC分类号： H01L29/66

CPC分类号： H01L29/7883 ,  H01L27/108 ,  H01L27/10802 ,  H01L29/42336 ,  H01L29/42392 ,  H01L29/66825 ,  H01L29/7841

摘要： A field effect transistor includes a buried gate pattern that is electrically isolated by being surrounded by a tunneling insulating film. The field effect transistor also includes a channel region that is floated by source and drain regions, a gate insulating film, and the tunneling insulating film. The buried gate pattern and the tunneling insulating film extend into the source and drain regions. Thus, the field effect transistor efficiently stores charge carriers in the buried gate pattern and the floating channel region.

摘要翻译： 场效应晶体管包括通过被隧道绝缘膜包围而电隔离的掩埋栅极图案。 场效应晶体管还包括由源极和漏极区域浮置的沟道区，栅极绝缘膜和隧道绝缘膜。 掩埋栅极图案和隧道绝缘膜延伸到源极和漏极区域。 因此，场效应晶体管有效地将电荷载流子存储在掩埋栅极图案和浮动沟道区域中。

公开(公告)号：US20080142904A1

公开(公告)日：2008-06-19

申请号：US12072440

申请日：2008-02-26

申请人： Ming Li ,  Dong-Uk Choi ,  Chang Woo Oh ,  Dong-Won Kim ,  Min-Sang Kim ,  Sung-Hwan Kim ,  Kyoung-Hwan Yeo

发明人： Ming Li ,  Dong-Uk Choi ,  Chang Woo Oh ,  Dong-Won Kim ,  Min-Sang Kim ,  Sung-Hwan Kim ,  Kyoung-Hwan Yeo

IPC分类号： H01L27/108

CPC分类号： H01L29/7883 ,  H01L27/108 ,  H01L27/10802 ,  H01L29/42336 ,  H01L29/42392 ,  H01L29/66825 ,  H01L29/7841

摘要： A field effect transistor includes a buried gate pattern that is electrically isolated by being surrounded by a tunneling insulating film. The field effect transistor also includes a channel region that is floated by source and drain regions, a gate insulating film, and the tunneling insulating film. The buried gate pattern and the tunneling insulating film extend into the source and drain regions. Thus, the field effect transistor efficiently stores charge carriers in the buried gate pattern and the floating channel region.

公开(公告)号：US20060131666A1

公开(公告)日：2006-06-22

申请号：US11241611

申请日：2005-09-30

申请人： Ming Li ,  Dong-Uk Choi ,  Chang-Woo Oh ,  Dong-Won Kim ,  Min-Sang Kim ,  Sung-Hwan Kim ,  Kyoung-Hwan Yeo

发明人： Ming Li ,  Dong-Uk Choi ,  Chang-Woo Oh ,  Dong-Won Kim ,  Min-Sang Kim ,  Sung-Hwan Kim ,  Kyoung-Hwan Yeo

IPC分类号： H01L21/336

CPC分类号： H01L29/7883 ,  H01L27/108 ,  H01L27/10802 ,  H01L29/42336 ,  H01L29/42392 ,  H01L29/66825 ,  H01L29/7841

摘要： A field effect transistor includes a buried gate pattern that is electrically isolated by being surrounded by a tunneling insulating film. The field effect transistor also includes a channel region that is floated by source and drain regions, a gate insulating film, and the tunneling insulating film. The buried gate pattern and the tunneling insulating film extend into the source and drain regions. Thus, the field effect transistor efficiently stores charge carriers in the buried gate pattern and the floating channel region.

摘要翻译： 场效应晶体管包括通过被隧道绝缘膜包围而电隔离的掩埋栅极图案。 场效应晶体管还包括由源极和漏极区域浮置的沟道区，栅极绝缘膜和隧道绝缘膜。 掩埋栅极图案和隧道绝缘膜延伸到源极和漏极区域。 因此，场效应晶体管有效地将电荷载流子存储在掩埋栅极图案和浮动沟道区域中。