摘要:
A bus monitoring and debugging system operating independently without impacting the normal operation of the CPU and without adding any overhead to the application being monitored. Users are alerted to timing problems as they occur, and bus statistics that are relevant to providing insight to system operation are automatically captured. Logging of relevant events may be enabled or disabled when a sliding time window expires, or alternatively by external trigger events.
摘要:
A bus monitoring and debugging system operating independently without impacting the normal operation of the CPU and without adding any overhead to the application being monitored. Bus transactions to a selected slave are monitored to determine possible conflicts when multiple masters may be addressing the slave. Users are alerted to timing problems as they occur, and bus statistics that are relevant to providing insight to system operation are automatically captured. Logging of relevant events may be enabled or disabled when a sliding time window expires, by a selected address range or alternatively by external trigger events.
摘要:
A bus monitoring and debugging system operating independently without impacting the normal operation of the CPU and without adding any overhead to the application being monitored. Users are alerted to timing problems as they occur, and bus statistics that are relevant to providing insight to system operation are automatically captured. Logging of relevant events may be enabled or disabled when a sliding time window expires, or alternatively by external trigger events.
摘要:
A bus monitoring and debugging system operating independently without impacting the normal operation of the CPU and without adding any overhead to the application being monitored. The bus is monitored for discarded speculative read and for merged write transactions in order to determine the true bus throughputs. Bus statistics that are relevant to providing insight to system operation are automatically captured. Logging of relevant events may be enabled or disabled when a sliding time window expires, or alternatively by external trigger events.
摘要:
A bus monitoring and debugging system operating independently without impacting the normal operation of the CPU and without adding any overhead to the application being monitored. The bus is monitored for discarded speculative read and for merged write transactions in order to determine the true bus throughputs. Bus statistics that are relevant to providing insight to system operation are automatically captured. Logging of relevant events may be enabled or disabled when a sliding time window expires, or alternatively by external trigger events.
摘要:
Profiling operating context. At least some of the illustrative embodiments are a computer-readable medium storing a program that, when executed by a processor, causes the processor to obtain values indicative of a state of an operating context parameter during execution of a traced program on a target processor, and display an indication of a proportion of time during a trace period of the traced program that the target processor operated with the operating context parameter in a particular state.
摘要:
A method and system of indexing into trace data based on entries in a log buffer. At least some of the illustrative embodiments are methods comprising executing a traced program on a target device. The traced program writes entries to a log buffer within the target device, and the traced program also contemporaneously writes an index value for each entry to a register. The index value written to the register becomes part of trace data regarding the traced program and correlates each entry to a respective portion of the trace data. Using the information one may either or both: display on a display device a portion of the trace data (the portion selected based on selecting an entry from the log buffer); or display on the display a portion of the log buffer (the portion selected based on selecting an entry from the trace data).
摘要:
An information carrier medium containing software that, when executed by a processor, causes the processor to receive information from circuit logic that is adapted to collect the information from caches on different cache levels, at least some of the information from caches on different cache levels associated with a common address. The software also causes the processor to selectively bypass a portion of the information specified by a user of the software and to provide non-bypassed information to the user and not said bypassed portion.
摘要:
A method and system of identifying overlays used by a program. The overlays may be executable overlays (e.g., overlay programs and dynamically linked library programs), or the overlays may be data sets. Depending on the number of overlays and/or the type of information used to identify the overlays, an indication of the identity of the overlays may be written to a register (whose contents are inserted into the trace data stream), or the indication may comprise an entry in a log buffer and an index value written to the register (again whose contents are inserted into the trace data stream, and where the index value identifies the entry in the log buffer).
摘要:
An information carrier medium containing software that, when executed by a processor, causes the processor to receive information from circuit logic that is adapted to collect the information from caches having a common cache level. The software also causes the processor to prioritize the caches having the common cache level such that the caches are displayable as having different cache levels.