利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

12 条记录 (耗时 0.015 秒)

    Memory security override protection for manufacturability of information handling systems
    4.
    发明申请
    Memory security override protection for manufacturability of information handling systems 有权
    内存安全覆盖了信息处理系统可制造性的保护

    公开(公告)号：US20090265792A1

    公开(公告)日：2009-10-22

    申请号：US12148643

    申请日：2008-04-21

    申请人： Ricardo L. Martinez ,  Richard Brian Wallace ,  Joshua N. Alperin ,  Charles Marion Ueltschey, III

    发明人： Ricardo L. Martinez ,  Richard Brian Wallace ,  Joshua N. Alperin ,  Charles Marion Ueltschey, III

    IPC分类号： G06F21/22

    CPC分类号： G06F21/572

    摘要： Systems and methods are disclosed for providing memory security override protection for improved manufacturability of information handling systems. A security authentication system is added to a software driven security override signal for unlocking programmable memory circuitry, such as flash memory, according to security protection techniques associated with the Intel AMT (Active Management Technology) architecture. This security authentication system disclosed requires authentication of software security override requests before they are allowed. More particularly, the systems and methods disclosed add specific BIOS (Basic Input Output System) code to check the security override status and the software security override request signals on boots of the computer system to make sure these requests are not coming from rogue elements within the computer system. If the authentication is validated, then the programmable memory circuitry is unlocked on the next boot of the system to allow for reprogramming.

    摘要翻译： 公开了用于提供用于提高信息处理系统的可制造性的存储器安全覆盖保护的系统和方法。 根据与Intel AMT（主动管理技术）架构相关联的安全保护技术，将安全认证系统添加到用于解锁可编程存储器电路（例如闪存）的软件驱动的安全覆盖信号。 所公开的该安全认证系统要求在允许之前对软件安全覆盖请求进行认证。 更具体地说，所公开的系统和方法增加了特定的BIOS（基本输入输出系统）代码，以检查计算机系统的靴子上的安全覆盖状态和软件安全覆盖请求信号，以确保这些请求不是来自于 电脑系统。 如果认证被验证，则可编程存储器电路在系统的下次引导时被解锁以允许重新编程。

    Apparatus to facilitate functional shock and vibration testing of device connections and related method
    5.
    发明授权
    Apparatus to facilitate functional shock and vibration testing of device connections and related method 有权
    便于设备连接的功能冲击和振动测试的设备及相关方法

    公开(公告)号：US07282925B2

    公开(公告)日：2007-10-16

    申请号：US10972752

    申请日：2004-10-25

    申请人： Joshua N. Alperin ,  Jeffrey M. Cardwell ,  Matthew J. McGowan

    发明人： Joshua N. Alperin ,  Jeffrey M. Cardwell ,  Matthew J. McGowan

    IPC分类号： G01R31/04 ,  G01R31/26

    CPC分类号： G06F11/24 ,  G01R31/2817 ,  G01R31/3183

    摘要： An apparatus and associated method are disclosed for facilitating the testing of device connections, including functional shock and vibration testing of peripheral card slots or any other desired connector interface. In part, a power supply located on the peripheral device, or some other external power source, is used to power fault detection circuitry. In this way, faults can be identified, such as through visual fault indicators, without the necessity of powering the system. In addition, simulated peripheral cards are provided that include adjustable weights so that the weight distribution of an actual card can be simulated without the necessity of having a functional peripheral in hand.

    摘要翻译： 公开了一种用于便于测试设备连接的装置和相关方法，包括外围卡槽或任何其它所需连接器接口的功能性冲击和振动测试。 部分地，位于外围设备上的电源或一些其他外部电源用于为故障检测电路供电。 通过这种方式，可以通过视觉故障指示器来识别故障，而不需要为系统供电。 此外，提供了包括可调重量的模拟外围卡，使得可以模拟实际卡的重量分布，而不需要具有功能外围设备。

    Method and system for restoring system configuration after disorderly shutdown
    6.
    发明授权
    Method and system for restoring system configuration after disorderly shutdown 有权
    无序关机后恢复系统配置的方法和系统

    公开(公告)号：US08335913B2

    公开(公告)日：2012-12-18

    申请号：US12206525

    申请日：2008-09-08

    申请人： Matthew B. Mendelow ,  Todd W. Schlottman ,  Joshua N. Alperin

    发明人： Matthew B. Mendelow ,  Todd W. Schlottman ,  Joshua N. Alperin

    IPC分类号： G06F9/00 ,  G06F15/177

    CPC分类号： G06F11/1441

    摘要： Disclosed are techniques for recovering system configuration settings, such as remote management, of an information handling system following a disorderly shutdown. A restart controller detects a disorderly shutdown of an information handling system and, in response, sets a disorderly shutdown flag and restarts the information handling system. During the restart, the basic input/output system (BIOS) checks the disorderly shutdown flag as part of its power-on housekeeping. In response to determining the disorderly shutdown flag has been set, the BIOS reconfigures the system configuration settings, such as the power management scheme, of the information handling system so as to enable one or more remote wake mechanisms, such as wake-on-LAN or wake-on-ring. The BIOS then performs an orderly shutdown of the information handling system to place the information handling system in a low-power state, from which the information handling system can be awoken via the remote wake mechanism.

    摘要翻译： 公开了用于在无序关闭之后恢复信息处理系统的系统配置设置（诸如远程管理）的技术。 重新启动控制器检测到信息处理系统的无序关闭，并且作为响应，设置无序的关闭标志并重新启动信息处理系统。 在重新启动期间，基本输入/输出系统（BIOS）会检查无序停机标志，作为其上电管家的一部分。 响应于确定已经设置了无序关闭标志，BIOS重新配置信息处理系统的系统配置设置（如电源管理方案），以便启用一个或多个远程唤醒机制，例如LAN唤醒 或唤醒环。 然后，BIOS执行信息处理系统的有序关闭以将信息处理系统置于低功率状态，通过远程唤醒机制可以从该功能状态唤醒信息处理系统。

    METHOD AND SYSTEM FOR RESTORING SYSTEM CONFIGURATION AFTER DISORDERLY SHUTDOWN
    8.
    发明申请
    METHOD AND SYSTEM FOR RESTORING SYSTEM CONFIGURATION AFTER DISORDERLY SHUTDOWN 有权
    异常关闭后恢复系统配置的方法和系统

    公开(公告)号：US20100064128A1

    公开(公告)日：2010-03-11

    申请号：US12206525

    申请日：2008-09-08

    申请人： Matthew B. Mendelow ,  Todd W. Schlottman ,  Joshua N. Alperin

    发明人： Matthew B. Mendelow ,  Todd W. Schlottman ,  Joshua N. Alperin

    IPC分类号： G06F1/24 ,  G06F15/177 ,  G06F1/32

    CPC分类号： G06F11/1441

    摘要： Disclosed are techniques for recovering system configuration settings, such as remote management, of an information handling system following a disorderly shutdown. A restart controller detects a disorderly shutdown of an information handling system and, in response, sets a disorderly shutdown flag and restarts the information handling system. During the restart, the basic input/output system (BIOS) checks the disorderly shutdown flag as part of its power-on housekeeping. In response to determining the disorderly shutdown flag has been set, the BIOS reconfigures the system configuration settings, such as the power management scheme, of the information handling system so as to enable one or more remote wake mechanisms, such as wake-on-LAN or wake-on-ring. The BIOS then performs an orderly shutdown of the information handling system to place the information handling system in a low-power state, from which the information handling system can be awoken via the remote wake mechanism.

    摘要翻译： 公开了用于在无序关闭之后恢复信息处理系统的系统配置设置（诸如远程管理）的技术。 重新启动控制器检测到信息处理系统的无序关闭，并且作为响应，设置无序的关闭标志并重新启动信息处理系统。 在重新启动期间，基本输入/输出系统（BIOS）会检查无序停机标志，作为其上电管家的一部分。 响应于确定已经设置了无序关闭标志，BIOS重新配置信息处理系统的系统配置设置（如电源管理方案），以便启用一个或多个远程唤醒机制，例如LAN唤醒 或唤醒环。 然后，BIOS执行信息处理系统的有序关闭以将信息处理系统置于低功率状态，通过远程唤醒机制可以从该功能状态唤醒信息处理系统。

    Draining residual charge from a voltage plane
    9.
    发明授权
    Draining residual charge from a voltage plane 有权
    从电压平面排出残留电荷

    公开(公告)号：US07120805B2

    公开(公告)日：2006-10-10

    申请号：US10412526

    申请日：2003-04-11

    申请人： Joshua N. Alperin ,  Glenroy Devonish ,  Ajay Kwatra ,  Todd W. Schlottman

    发明人： Joshua N. Alperin ,  Glenroy Devonish ,  Ajay Kwatra ,  Todd W. Schlottman

    IPC分类号： G06F1/26 ,  H03L5/00

    CPC分类号： G06F1/26

    摘要： An energy discharge resistance is isolated from storage capacitance containing a voltage charge until power is removed from the storage capacitance. Then the discharge resistance may be coupled to the storage capacitance to drain residual charge therefrom. The discharge resistance is coupled to the storage capacitance when external power is removed and is un-coupled from the storage capacitance when external power is applied to the storage capacitance. In this way, unnecessary power draw during operation or standby of an electronic system is substantially eliminated.

    摘要翻译： 能量放电电阻与包含电荷电荷的存储电容隔离，直到从存储电容去除功率。 然后，放电电阻可以耦合到存储电容以从其中排出剩余电荷。 当外部电源被去除时，放电电阻耦合到存储电容，并且当外部电源施加到存储电容时，放电电阻与存储电容不耦合。 以这种方式，基本上消除了在电子系统的操作或待机期间的不必要的电力消耗。

    Memory security override protection for manufacturability of information handling systems
    10.
    发明授权
    Memory security override protection for manufacturability of information handling systems 有权
    内存安全覆盖了信息处理系统可制造性的保护

    公开(公告)号：US08132253B2

    公开(公告)日：2012-03-06

    申请号：US12148643

    申请日：2008-04-21

    申请人： Ricardo L. Martinez ,  Richard Brian Wallace ,  Joshua N. Alperin ,  Charles Marion Ueltschey, III

    发明人： Ricardo L. Martinez ,  Richard Brian Wallace ,  Joshua N. Alperin ,  Charles Marion Ueltschey, III

    IPC分类号： G06F21/00

    CPC分类号： G06F21/572

    摘要： Systems and methods are disclosed for providing memory security override protection for improved manufacturability of information handling systems. A security authentication system is added to a software driven security override signal for unlocking programmable memory circuitry, such as flash memory, according to security protection techniques associated with the Intel AMT (Active Management Technology) architecture. This security authentication system disclosed requires authentication of software security override requests before they are allowed. More particularly, the systems and methods disclosed add specific BIOS (Basic Input Output System) code to check the security override status and the software security override request signals on boots of the computer system to make sure these requests are not coming from rogue elements within the computer system. If the authentication is validated, then the programmable memory circuitry is unlocked on the next boot of the system to allow for reprogramming.

    摘要翻译： 公开了用于提供用于提高信息处理系统的可制造性的存储器安全覆盖保护的系统和方法。 根据与Intel AMT（主动管理技术）架构相关联的安全保护技术，将安全认证系统添加到用于解锁可编程存储器电路（例如闪存）的软件驱动的安全覆盖信号。 所公开的该安全认证系统要求在允许之前对软件安全覆盖请求进行认证。 更具体地说，所公开的系统和方法增加了特定的BIOS（基本输入输出系统）代码，以检查计算机系统的靴子上的安全覆盖状态和软件安全覆盖请求信号，以确保这些请求不是来自于 电脑系统。 如果认证被验证，则可编程存储器电路在系统的下次引导时被解锁以允许重新编程。