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公开(公告)号：US06961186B2
公开(公告)日：2005-11-01
申请号：US10672620
申请日：2003-09-26
CPC分类号： G03F7/70241 , G02B13/143
摘要： Improvements in the fabrication of integrated circuits are driven by the decrease of the size of the features printed on the wafers. Current lithography techniques limits have been extended through the use of phase-shifting masks, off-axis illumination, and proximity effect correction. More recently, liquid immersion lithography has been proposed as a way to extend even further the limits of optical lithography. This invention described a methodology based on contact printing using a projection lens to define the image of the mask onto the wafer. As the imaging is performed in a solid material, larger refractive indices can be obtained and the resolution of the imaging system can be increased.
摘要翻译： 集成电路制造的改进由印刷在晶片上的特征的尺寸的减小驱动。 通过使用相移掩模，离轴照明和接近效应校正，目前的光刻技术限制已得到扩展。 最近，已经提出液浸光刻作为进一步扩展光学光刻的限制的一种方式。 本发明描述了基于使用投影透镜的接触印刷将掩模的图像定义在晶片上的方法。 当以固体材料进行成像时，可以获得更大的折射率并且可以提高成像系统的分辨率。
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公开(公告)号：US20110207056A1
公开(公告)日：2011-08-25
申请号：US13066816
申请日：2011-04-25
CPC分类号： B82Y10/00 , G03F7/70325 , G03F7/70958
摘要： Improvements in the fabrication of integrated circuits are driven by the decrease of the size of the features printed on the wafers. Current lithography techniques limits have been extended through the use of phase-shifting masks, off-axis illumination, and proximity effect correction. More recently, liquid immersion lithography has been proposed as a way to extend even further the limits of optical lithography. This invention described a methodology based on contact or proximity printing using a projection lens to define the image of the mask onto the wafer. As the imaging is performed in a solid material, larger refractive indices can be obtained and the resolution of the imaging system can be increased.
摘要翻译： 集成电路制造的改进由印刷在晶片上的特征的尺寸的减小驱动。 通过使用相移掩模，离轴照明和接近效应校正，目前的光刻技术限制已得到扩展。 最近，已经提出液浸光刻作为进一步扩展光学光刻的限制的一种方式。 本发明描述了一种基于使用投影透镜的接触或邻近打印以将掩模的图像定义到晶片上的方法。 当以固体材料进行成像时，可以获得更大的折射率并且可以提高成像系统的分辨率。
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公开(公告)号：US07614033B2
公开(公告)日：2009-11-03
申请号：US11442110
申请日：2006-05-26
IPC分类号： G06F17/50
摘要： The manufacturing of integrated circuits relies on the use of optical proximity correction (OPC) to correct the printing of the features on the wafer. The data is subsequently fractured to accommodate the format of existing mask writer. The complexity of the correction after OPC can create some issues for vector-scan e-beam mask writing tools as very small slivers are created when the data is converted to the mask write tool format. Moreover the number of shapes created after fracturing is quite large and are not related to some important characteristics of the layout like for example critical areas. A new technique is proposed where the order of the OPC and fracturing steps is reversed. The fracturing step is done first in order to guarantee that no slivers are created and that the number of shapes is minimized. The shapes created can also follow the edges of critical zones so that critical and non-critical edges can be differentiated during the subsequent OPC step.
摘要翻译： 集成电路的制造依赖于使用光学邻近校正（OPC）来校正晶片上的特征的打印。 数据随后被破碎以适应现有的掩码写入器的格式。 当OPC将数据转换为掩码写入工具格式时，OPC之后的校正的复杂度可能会为矢量扫描电子束掩模写入工具创建一些问题，因为非常小的条带被创建。 此外，压裂后产生的形状数量相当大，与布局的某些重要特征无关，例如关键区域。 提出了一种新技术，其中OPC和压裂步骤的顺序相反。 首先进行压裂步骤，以确保没有创建条子，并且形状的数量最小化。 所创建的形状也可以跟随关键区域的边缘，以便在随后的OPC步骤期间可以区分关键和非关键边缘。
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4.发明授权Delay reduction of hardware implementation of the maximum a posteriori (MAP) method 有权延迟减少硬件实现的最大后验（MAP）方法公开(公告)号：US06871316B1
公开(公告)日：2005-03-22
申请号：US10060526
申请日：2002-01-30
申请人： Alfred Kwok-Kit Wong , Cheng Qian
发明人： Alfred Kwok-Kit Wong , Cheng Qian
CPC分类号： H03M13/3905 , H03M13/3961 , H03M13/4107
摘要： A decoder generally comprising a branch metrics circuit and a state metrics circuit. The branch metrics circuit may be configured to generate a plurality of branch metric signals. The state metrics circuit may be configured to (i) add the branch metric signals to a plurality of state metric signals to generate a plurality of intermediate signals, (ii) determine a next state metric signal to the state metric signals, (iii) determine a normalization signal in response to the intermediate signals, and (iv) normalize the state metric signals in response to the normalization signal.
摘要翻译： 通常包括分支度量电路和状态度量电路的解码器。 分支度量电路可以被配置为生成多个分支度量信号。 状态度量电路可以被配置为（i）将分支度量信号添加到多个状态度量信号以产生多个中间信号，（ii）确定下一个状态量度信号到状态量度信号，（iii）确定 响应于中间信号的归一化信号，以及（iv）响应于归一化信号来归一化状态量度信号。
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公开(公告)号：US06526164B1
公开(公告)日：2003-02-25
申请号：US09320901
申请日：1999-05-27
IPC分类号： G06K900
CPC分类号： G03F7/7065 , G06T7/0004
摘要： A method for determining whether a defect that is detected by photomask inspection will adversely affect a semiconductor device, such as a wafer. The method has the ability of relating defect specifications directly to device performance and wafer yields, and assessing the impact of combining the defect with the critical dimension error using standard inspection tools. More specifically, the method includes the steps of: inspecting the photomask for defects; measuring the size and location of the defects relative to features on the photomask; classifying the defects by type of defect; assigning an equivalent mask critical dimension error (EME) value to each of the features based on size, location and type of defect; assigning a total mask error to each of the features by adding EME values to each defect impacting the features; and comparing the equivalent critical dimension error to a mask critical dimension error tolerance to determine whether the defects adversely affect the performance of the semiconductor device.
摘要翻译： 用于确定通过光掩模检查检测到的缺陷是否将不利地影响诸如晶片的半导体器件的方法。 该方法具有将缺陷规格直接与器件性能和晶片产量相关联的能力，并使用标准检测工具评估将缺陷与临界尺寸误差组合的影响。 更具体地，该方法包括以下步骤：检查光掩模的缺陷; 测量相对于光掩模上的特征的缺陷的尺寸和位置; 通过缺陷类型对缺陷进行分类; 基于缺陷的大小，位置和类型为每个特征分配等效的掩模临界尺寸误差（EME）值; 通过将EME值添加到影响特征的每个缺陷来为每个特征分配总掩码错误; 并将等效临界尺寸误差与掩模临界尺寸误差容差进行比较，以确定缺陷是否对半导体器件的性能产生不利影响。
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公开(公告)号：US5965306A
公开(公告)日：1999-10-12
申请号：US950620
申请日：1997-10-15
CPC分类号： G03F1/84 , G03F7/70616 , G03F7/70625 , G03F7/7065
摘要： A method for determining if an undesirable feature on a photomask will adversely affect the performance of the semiconductor integrated circuit device that the mask is being used to create. The method includes inspecting the photomask for undesirable features and analyzing the designed features close to the defects. This analysis is performed on lithographic images that represent the image that is transferred onto the semiconductor wafer by the lithography process. This analysis takes into account the effect of variations that are present in the lithography process. Through knowledge of the effects of variations in mask critical dimension of a feature on the lithographic image of that feature, the analysis results in the assignment of an equivalent critical dimension error to the defect. This equivalent critical dimension error is then compared to the mask critical dimension error specification to determine whether or not the defect will adversely affect the device.
摘要翻译： 用于确定光掩模上的不期望的特征是否会不利地影响正在使用掩模来形成的半导体集成电路器件的性能的方法。 该方法包括检查光掩模的不良特征并分析靠近缺陷的设计特征。 该分析在通过光刻工艺表示转印到半导体晶片上的图像的光刻图像上进行。 该分析考虑了光刻过程中存在的变化的影响。 通过了解特征的掩模临界尺寸的变化对该特征的平版印刷图像的影响的知识，分析导致将等同的临界尺寸误差分配给缺陷。 然后将该等效临界尺寸误差与掩模临界尺寸误差规范进行比较，以确定缺陷是否会对设备产生不利影响。
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