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公开(公告)号：US06449570B1
公开(公告)日：2002-09-10
申请号：US09717628
申请日：2000-11-21
IPC分类号： G06F1700
CPC分类号： G01R29/0273 , G01R29/02 , G01R29/26
摘要： A system is disclosed for precisely measuring time intervals, used to either characterize or diminish noise components in repetitive waveforms. An interval timer generates a whole number count of cycles in combination with beginning and ending ramps capable of resolving fractions of a cycle, to accurately register the time interval. Selection logic can be implemented to time either single periods or spans of multiple consecutive periods of the waveforms. Multiple time measurements are arranged in sets, each set corresponding to a different span of “N” consecutive periods over a range of values for N. A variance of each set is generated, and an array of variance vs N provides a function having properties of an auto-correlation function. Instrument jitter can be reduced based on measurements of period spans rather than individual periods, and is reduced in proportion to the increasing size of the measured span. These techniques are enhanced by random statistical samples, obtained by a dithering of the measurement rate. This also diminishes the impact of aliasing products.
摘要翻译： 公开了用于精确测量时间间隔的系统，用于表征或减少重复波形中的噪声分量。 一个间隔定时器产生一个整数周期数，结合起始和结束斜坡能够解决周期的分数，以准确地注册时间间隔。 选择逻辑可以实现为波形的多个连续周期的单个周期或跨度。 多个时间测量以组合的形式排列，每个集合对应于在N个值的范围内的不同跨度的“N”个连续周期。产生每组的方差，并且方差对N的阵列提供具有 自相关函数。 仪器抖动可以基于周期跨度而不是单个周期的测量来减少，并且与测量的跨度的增加的尺寸成比例地减小。 这些技术通过随机统计样本增强，通过测量速率的抖动获得。 这也减少了混叠产品的影响。
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公开(公告)号：US06194925B1
公开(公告)日：2001-02-27
申请号：US09039344
申请日：1998-03-13
IPC分类号： H03K406
CPC分类号： G01R29/0273 , G01R29/02 , G01R29/26
摘要： A linear ramp generating and control circuit finding particular applicability in a time interval measurement system. The linear ramp circuit includes a hold capacitor which may be linearly discharged during one operating mode of the circuit by coupling a constant current source to the capacitor. The voltage on the hold capacitor is linearly discharged away from a baseline voltage level to a data voltage level which is subsequently passed to an analog-to-digital converter of the time interval measurement system for further processing. The hold capacitor voltage is returned to the baseline voltage level during a recovery mode of circuit operation by a recovery or recharge network. The recharge network may include an active-feedback circuit which implements an approximately second-order voltage response to the hold capacitor during the recovery mode of operation. The circuit may also include a composite amplifier for buffering the hold capacitor voltage level to a circuit output during a hold mode of circuit operation. The effect of this invention is that the errors such as drift, signal noise, and baseline voltage instability can be minimized.
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公开(公告)号：US06185509B2
公开(公告)日：2001-02-06
申请号：US09039121
申请日：1998-03-13
IPC分类号： G06F1700
CPC分类号： G01R29/0273 , G01R29/02 , G01R29/26
摘要： A system is disclosed for precisely measuring time intervals, used to either characterize or diminish noise components in repetitive waveforms. An interval timer generates a whole number count of cycles in combination with beginning and ending ramps capable of resolving fractions of a cycle, to accurately register the time interval. Selection logic can be implemented to time either single periods or spans of multiple consecutive periods of the waveforms. Multiple time measurements are arranged in sets, each set corresponding to a different span of “N” consecutive periods over a range of values for N. A variance of each set is generated, and an array of variance vs N provides a function having properties of an auto-correlation function. Instrument jitter can be reduced based on measurements of period spans rather than individual periods, and is reduced in proportion to the increasing size of the measured span. These techniques are enhanced by random statistical samples, obtained by a dithering of the measurement rate. This also diminishes the impact of aliasing products.
摘要翻译： 公开了用于精确测量时间间隔的系统，用于表征或减少重复波形中的噪声分量。 一个间隔定时器产生一个整数周期数，结合起始和结束斜坡能够解决周期的分数，以准确地注册时间间隔。 选择逻辑可以实现为波形的多个连续周期的单个周期或跨度。 多个时间测量以组合的形式排列，每个集合对应于在N个值的范围内的不同跨度的“N”个连续周期。产生每组的方差，并且方差对N的阵列提供具有 自相关函数。 仪器抖动可以基于周期跨度而不是单个周期的测量来减少，并且与测量的跨度的增加的尺寸成比例地减小。 这些技术通过随机统计样本增强，通过测量速率的抖动获得。 这也减少了混叠产品的影响。
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公开(公告)号：US4527126A
公开(公告)日：1985-07-02
申请号：US526551
申请日：1983-08-26
申请人： Dennis M. Petrich , Jan B. Wilstrup
发明人： Dennis M. Petrich , Jan B. Wilstrup
CPC分类号： G01R29/0273 , G04F10/10
摘要： An improved delay lock loop which has first and second means (32, 34) for generating a voltage ramp, the first ramp generator (32) providing a train of ramped inputs to first time delay means (38) responsive to a first input pulse train and the second ramp generator (34) providing a train of ramped inputs to a second time delay means (40) responsive to a second input pulse train. The ramp generators (32, 34) provide a highly linear voltage ramp. First and second retrace means (36A, 36B) are connected to the first and second ramp generators (32, 34) respectively and act to limit the ramps to a certain voltage, commanding the ramp generators (32, 34) to return to a reference voltage to await the succeeding input pulse edge transition. A further improvement comprises range switch means (44) that function to selectively control the maximum range of time delay which the delay lock loop is able to sense. This permits selecting a greater or lesser range of time which the delay in time intervals between the edge transitions of the pulses in the first and second input pulse in the first and second input pulse trains can have and still be measured. Additionally, calibrator means (26) are incorporated which provide signals to the delay lock loop and ancillary electronics to determine the delay inherent in these devices. This delay is stored and subtracted from the delay determined by the delay lock loop to increase the accuracy. The calibrator (26) additionally very accurately determines the voltage difference between the voltage representing zero volts on the ramp and the voltage representing full scale on the ramp to very accurately determine the voltage span representative of the selected range.
摘要翻译： 一种改进的延迟锁定环，其具有用于产生电压斜坡的第一和第二装置（32,34），所述第一斜坡发生器（32）响应于第一输入脉冲串向第一时间延迟装置（38）提供一系列斜坡输入， 并且第二斜坡发生器（34）响应于第二输入脉冲串向第二时间延迟装置（40）提供一系列斜坡输入。 斜坡发生器（32,34）提供高度线性的电压斜坡。 第一和第二回扫装置（36A，36B）分别连接到第一和第二斜坡发生器（32,34），并且用于将斜坡限制到一定电压，命令斜坡发生器（32,34）返回参考 电压等待接下来的输入脉冲边沿转换。 进一步的改进包括范围切换装置（44），其用于选择性地控制延迟锁定环能够感测的最大延迟时间范围。 这允许选择更大或更小的时间范围，其中在第一和第二输入脉冲串中的第一和第二输入脉冲中的脉冲的边沿跃迁之间的时间间隔的延迟可以并且仍然被测量。 此外，结合了校准器装置（26），其向延迟锁定环路和辅助电子装置提供信号以确定这些装置中固有的延迟。 该延迟由延迟锁定环路确定的延迟进行存储和减去，以提高精度。 校准器（26）另外非常精确地确定在斜坡上表示零伏的电压与表示斜坡上的满量程的电压之间的电压差，以非常精确地确定表示所选范围的电压范围。
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公开(公告)号：US06356850B1
公开(公告)日：2002-03-12
申请号：US09240742
申请日：1999-01-29
申请人： Jan B. Wilstrup , Dennis M. Petrich
发明人： Jan B. Wilstrup , Dennis M. Petrich
IPC分类号： G01R1300
CPC分类号： G01R29/26 , G01R29/0273 , H04L1/205
摘要： A method, apparatus, and article of manufacture for separating the components of a jitter signal. The method includes the steps of obtaining measurements of the spans of a signal, generating variation measurements for each of the spans, transforming the variation estimates from a time domain to a frequency domain, and determining the random component and the periodic component of the jitter signal.
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公开(公告)号：US5773990A
公开(公告)日：1998-06-30
申请号：US536206
申请日：1995-09-29
IPC分类号： G01R31/30 , G01R31/319 , G01R31/3193 , G01R15/12
CPC分类号： G01R31/3004 , G01R31/3008 , G01R31/31924 , G01R31/3193
摘要： A power supply for testing an integrated circuit includes a source voltage input terminal for receiving an input voltage. The power supply serves as both a DUT active power supply and an IDDQ measurement circuit, without the need for switching between separate DUT active power supply and IDDQ measurement circuits. In one embodiment, a current source output driver includes a diode across a current sensing resistor inside a feedback loop. This minimizes VDD changes when the DUT demands transient current, such as when loading IDDQ test vectors. Moreover, with decreased transient changes in VDD, dielectric absorption effects of a decoupling capacitor are reduced.
摘要翻译： 用于测试集成电路的电源包括用于接收输入电压的源极电压输入端子。 电源既可用作DUT有源电源，也可用作IDDQ测量电路，无需在单独的DUT有源电源和IDDQ测量电路之间切换。 在一个实施例中，电流源输出驱动器包括反馈回路内的电流检测电阻器两端的二极管。 当DUT需要瞬态电流时，例如当加载IDDQ测试矢量时，这可以最大限度地减少VDD变化。 此外，随着VDD瞬变的减小，去耦电容的介电吸收效应降低。
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