Integrated circuit devices with ESD protection in scribe line, and methods for fabricating same
    3.
    发明授权
    Integrated circuit devices with ESD protection in scribe line, and methods for fabricating same 有权
    在划线中具有ESD保护的集成电路器件及其制造方法

    公开(公告)号:US08372729B1

    公开(公告)日:2013-02-12

    申请号:US13285928

    申请日:2011-10-31

    摘要: A semiconductor wafer including an electrostatic discharge (ESD) protective device, and methods for fabricating the same. In one aspect, the method includes forming a first semiconductor device in a first semiconductor die region on the semiconductor wafer; forming a second semiconductor device in a second semiconductor die region on the semiconductor wafer; and forming a protective device in a scribe line region between (i) the first semiconductor die region and (ii) the second semiconductor die region.

    摘要翻译: 包括静电放电(ESD)保护装置的半导体晶片及其制造方法。 一方面,该方法包括在半导体晶片上的第一半导体管芯区域中形成第一半导体器件; 在所述半导体晶片上的第二半导体管芯区域中形成第二半导体器件; 以及在(i)第一半导体管芯区域和(ii)第二半导体管芯区域之间的划线区域中形成保护器件。

    Stress programming of transistors
    5.
    发明授权
    Stress programming of transistors 有权
    晶体管的应力编程

    公开(公告)号:US08149011B1

    公开(公告)日:2012-04-03

    申请号:US12953117

    申请日:2010-11-23

    IPC分类号: G01R31/02

    CPC分类号: G01R31/2621

    摘要: A method comprising applying a first voltage to a first transistor to create a defect in the first transistor, wherein (i) the first voltage is greater than a maximum operational voltage of the first transistor and (ii) the maximum operational voltage does not cause a defect in the first transistor when applied to the first transistor. The method further includes determining whether the first transistor has been programmed, including (i) measuring a first current through the first transistor, (ii) measuring a second current through a second transistor, and (iii) comparing the measured first current to the measured second current, wherein a difference between the measured first current and the measured second current indicates that the first transistor has been programmed.

    摘要翻译: 一种方法,包括向第一晶体管施加第一电压以在第一晶体管中产生缺陷,其中(i)第一电压大于第一晶体管的最大工作电压,以及(ii)最大工作电压不会导致 当施加到第一晶体管时,第一晶体管的缺陷。 该方法还包括确定第一晶体管是否已经被编程,包括(i)测量通过第一晶体管的第一电流,(ii)测量通过第二晶体管的第二电流,以及(iii)将测量的第一电流与测量的 第二电流,其中测量的第一电流和测量的第二电流之间的差指示第一晶体管已被编程。

    Stress programming of transistors
    6.
    发明授权
    Stress programming of transistors 有权
    晶体管的应力编程

    公开(公告)号:US07839160B1

    公开(公告)日:2010-11-23

    申请号:US12053428

    申请日:2008-03-21

    IPC分类号: G01R31/26

    CPC分类号: G01R31/2621

    摘要: Methods for stressing transistors in order to program the transistors and for determining whether such transistors have indeed been programmed are described herein. The novel methods may include initially stressing a transistor by applying to the transistor a voltage greater than operational voltages of the transistor to create defects in the transistor. A current flowing through the transistor may then be measured to determine whether the transistor has been programmed, the measured current indicative of the presence of the defects.

    摘要翻译: 这里描述了为了对晶体管进行编程并且用于确定这样的晶体管是否确实被编程的压力晶体管的方法。 新颖的方法可以包括最初通过向晶体管施加大于晶体管的工作电压的电压来施加晶体管,从而在晶体管中产生缺陷。 然后可以测量流过晶体管的电流,以确定晶体管是否已被编程,所测量的电流指示缺陷的存在。

    Electrostatic discharge protection
    7.
    发明授权
    Electrostatic discharge protection 有权
    静电放电保护

    公开(公告)号:US06818955B1

    公开(公告)日:2004-11-16

    申请号:US10412076

    申请日:2003-04-09

    IPC分类号: H01L2362

    摘要: An electrostatic discharge device may provide better protection of an integrated circuit by more uniform breakdown of a plurality of finger regions. The plurality of finger regions may extend through a first region of a substrate having a first conductivity type and into a second region of the substrate more lightly doped with impurities of the first conductivity type. An electrostatic discharge device may include a collector region having a middle region that may be highly doped with impurities of the first conductivity type. The middle region may be proximate to a layer that is lightly doped with impurities of the first conductivity type and a layer that is doped with impurities of the second conductivity type. The collector region may decrease the breakdown voltage of the electrostatic discharge device.

    摘要翻译: 静电放电装置可以通过多个手指区域的更均匀的击穿来提供对集成电路的更好的保护。 多个指状区域可以延伸穿过具有第一导电类型的衬底的第一区域,并且进一步轻掺杂有第一导电类型的杂质的衬底的第二区域。 静电放电装置可以包括具有可以高度掺杂有第一导电类型的杂质的中间区域的集电极区域。 中间区域可以接近轻掺杂第一导电类型的杂质的层和掺杂有第二导电类型的杂质的层。 集电极区域可以降低静电放电装置的击穿电压。

    Electrostatic discharge protection
    8.
    发明授权
    Electrostatic discharge protection 失效
    静电放电保护

    公开(公告)号:US06987301B1

    公开(公告)日:2006-01-17

    申请号:US10412099

    申请日:2003-04-09

    IPC分类号: H01L23/62

    摘要: An electrostatic discharge device may provide better protection of an integrated circuit by more uniform breakdown of a plurality of finger regions. The plurality of finger regions may extend through a first region of a substrate having a first conductivity type and into a second region of the substrate more lightly doped with impurities of the first conductivity type. An electrostatic discharge device may include a collector region having a middle region that may be highly doped with impurities of the first conductivity type. The middle region may be proximate to a layer that is lightly doped with impurities of the first conductivity type and a layer that is doped with impurities of the second conductivity type. The collector region may decrease the breakdown voltage of the electrostatic discharge device.

    摘要翻译: 静电放电装置可以通过多个手指区域的更均匀的击穿来提供对集成电路的更好的保护。 多个指状区域可以延伸穿过具有第一导电类型的衬底的第一区域,并且进一步轻掺杂有第一导电类型的杂质的衬底的第二区域。 静电放电装置可以包括具有可以高度掺杂有第一导电类型的杂质的中间区域的集电极区域。 中间区域可以接近轻掺杂第一导电类型的杂质的层和掺杂有第二导电类型的杂质的层。 集电极区域可以降低静电放电装置的击穿电压。