公开(公告)号：US08586406B1

公开(公告)日：2013-11-19

申请号：US13789641

申请日：2013-03-07

申请人： Chunghwa Picture Tubes, Ltd.

发明人： Der-Chun Wu

IPC分类号： H01L21/00 ,  H01L21/16

CPC分类号： H01L27/1288 ,  H01L21/0274 ,  H01L21/32139 ,  H01L21/467 ,  H01L29/66969 ,  H01L29/7869

摘要： A method for forming an oxide thin film transistor is provided. A gate electrode, a semiconductor insulation layer and a metal oxide layer is sequentially disposed on a substrate. A first patterned photo-resist layer is disposed on the metal oxide layer using a gray-level mask. The first patterned photo-resist layer is used as a mask to etch the metal oxide layer to form a patterned metal oxide layer. A part of the first patterned photo-resist layer is removed to form a second patterned photo-resist layer. A metal layer is formed and a third patterned photo-resist layer is used as a mask to etch the metal layer to form a source region and a drain region and to expose the second patterned photo-resist layer. The third patterned photo-resist layer and a part of second patterned photo-resist layer are removed to form a fourth patterned photo-resist layer.

摘要翻译： 提供一种形成氧化物薄膜晶体管的方法。 栅极电极，半导体绝缘层和金属氧化物层依次设置在基板上。 使用灰度掩模将第一图案化的光致抗蚀剂层设置在金属氧化物层上。 第一图案化光致抗蚀剂层用作掩模以蚀刻金属氧化物层以形成图案化的金属氧化物层。 去除第一图案化光致抗蚀剂层的一部分以形成第二图案化光致抗蚀剂层。 形成金属层，并且使用第三图案化的光致抗蚀剂层作为掩模来蚀刻金属层以形成源极区域和漏极区域并暴露第二图案化的光致抗蚀剂层。 去除第三图案化光致抗蚀剂层和第二图案化光致抗蚀剂层的一部分以形成第四图案化光致抗蚀剂层。

公开(公告)号：US08541288B2

公开(公告)日：2013-09-24

申请号：US13775270

申请日：2013-02-25

申请人： Chunghwa Picture Tubes, Ltd.

发明人： Der-Chun Wu ,  Yu-Hsien Chen ,  Sheng-Fa Liu

IPC分类号： H01L23/544

CPC分类号： G02F1/133784 ,  G02F1/133707 ,  H01L21/31 ,  H01L23/544 ,  H01L27/1248 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2924/0002 ,  H01L2924/00

摘要： A manufacturing method for a TFT array substrate includes providing a substrate; defining a plurality of normal alignment regions and a plurality of abnormal alignment regions on the substrate; forming an insulating layer and a transparent conductive layer on the substrate; performing a patterning process to at least one of the insulating layer and the transparent conductive layer to form a plurality of alignment structures in each abnormal alignment region; forming an alignment material layer on the substrate, the alignment material layer having a plurality of first alignment slits formed along the alignment structures in each of the abnormal alignment regions; and performing a rubbing alignment process to form a plurality of second alignment slits on the alignment material layer in each of the normal alignment regions along a alignment direction.

摘要翻译： TFT阵列基板的制造方法包括：提供基板; 在衬底上限定多个正常取向区域和多个异常对准区域; 在基板上形成绝缘层和透明导电层; 对所述绝缘层和所述透明导电层中的至少一个进行图案化处理，以在每个异常对准区域中形成多个对准结构; 在所述基板上形成取向材料层，所述取向材料层具有沿着所述异常取向区域中的取向结构形成的多个第一对准狭缝; 并且进行摩擦取向处理以沿着取向方向在每个正常取向区域中的取向材料层上形成多个第二对准狭缝。

公开(公告)号：US20170025443A1

公开(公告)日：2017-01-26

申请号：US14809021

申请日：2015-07-24

申请人： Chunghwa Picture Tubes, LTD.

发明人： Der-Chun Wu ,  Shin-Chuan Chiang ,  Yu-Hsien Chen ,  Po-Lung Chen ,  Yi-Hsien Lin ,  Cheng-Jung Yang ,  Kuo-Hsing Tseng

IPC分类号： H01L27/12 ,  H01L29/786

CPC分类号： H01L27/1225 ,  H01L27/1288 ,  H01L29/66969 ,  H01L29/7869

摘要： A method manufacturing a thin film transistor is provided. A gate, a first insulation layer covering the gate, a semiconductor layer over the gate, and a first photoresist pattern are sequentially formed on a substrate. The semiconductor layer is patterned into a channel layer by using the first photoresist pattern as a mask and the first photoresist pattern is subsequently shrunken to remain a portion of the first photoresist pattern on the channel layer. A conductive material layer covering the remained portion of the first photoresist pattern, the channel layer and the first insulation layer is patterned by using a second photoresist pattern as a mask to form a source and a drain separated by a gap region exposing the remained portion. The second photoresist pattern and the remained portion are removed by performing a stripping process to expose the channel layer between the source and the drain.

摘要翻译： 提供制造薄膜晶体管的方法。 在基板上依次形成栅极，覆盖栅极的第一绝缘层，栅极上的半导体层和第一光致抗蚀剂图案。 通过使用第一光致抗蚀剂图案作为掩模将半导体层图案化为沟道层，并且随后第一光致抗蚀剂图案缩小以保留沟道层上的第一光致抗蚀剂图案的一部分。 通过使用第二光致抗蚀剂图案作为掩模，覆盖第一光致抗蚀剂图案的剩余部分，沟道层和第一绝缘层的导电材料层，以形成由露出剩余部分的间隙区域分开的源极和漏极。 通过进行剥离工艺以除去源极和漏极之间的沟道层，去除第二光致抗蚀剂图案和残留部分。

公开(公告)号：US09543330B1

公开(公告)日：2017-01-10

申请号：US14809021

申请日：2015-07-24

申请人： Chunghwa Picture Tubes, LTD.

发明人： Der-Chun Wu ,  Shin-Chuan Chiang ,  Yu-Hsien Chen ,  Po-Lung Chen ,  Yi-Hsien Lin ,  Cheng-Jung Yang ,  Kuo-Hsing Tseng

IPC分类号： H01L21/00 ,  H01L27/12 ,  H01L29/786

CPC分类号： H01L27/1225 ,  H01L27/1288 ,  H01L29/66969 ,  H01L29/7869

摘要： A method manufacturing a thin film transistor is provided. A gate, a first insulation layer covering the gate, a semiconductor layer over the gate, and a first photoresist pattern are sequentially formed on a substrate. The semiconductor layer is patterned into a channel layer by using the first photoresist pattern as a mask and the first photoresist pattern is subsequently shrunken to remain a portion of the first photoresist pattern on the channel layer. A conductive material layer covering the remained portion of the first photoresist pattern, the channel layer and the first insulation layer is patterned by using a second photoresist pattern as a mask to form a source and a drain separated by a gap region exposing the remained portion. The second photoresist pattern and the remained portion are removed by performing a stripping process to expose the channel layer between the source and the drain.

摘要翻译： 提供制造薄膜晶体管的方法。 在基板上依次形成栅极，覆盖栅极的第一绝缘层，栅极上的半导体层和第一光致抗蚀剂图案。 通过使用第一光致抗蚀剂图案作为掩模将半导体层图案化为沟道层，并且随后第一光致抗蚀剂图案缩小以保留沟道层上的第一光致抗蚀剂图案的一部分。 通过使用第二光致抗蚀剂图案作为掩模，覆盖第一光致抗蚀剂图案的剩余部分，沟道层和第一绝缘层的导电材料层，以形成由露出剩余部分的间隙区域分开的源极和漏极。 通过进行剥离工艺以除去源极和漏极之间的沟道层，去除第二光致抗蚀剂图案和残留部分。

公开(公告)号：US20130164908A1

公开(公告)日：2013-06-27

申请号：US13775270

申请日：2013-02-25

申请人： Chunghwa Picture Tubes, Ltd.

发明人： Der-Chun Wu ,  Yu-Hsien Chen ,  Sheng-Fa Liu

IPC分类号： H01L21/31

CPC分类号： G02F1/133784 ,  G02F1/133707 ,  H01L21/31 ,  H01L23/544 ,  H01L27/1248 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2924/0002 ,  H01L2924/00

摘要： A manufacturing method for a TFT array substrate includes providing a substrate; defining a plurality of normal alignment regions and a plurality of abnormal alignment regions on the substrate; forming an insulating layer and a transparent conductive layer on the substrate; performing a patterning process to at least one of the insulating layer and the transparent conductive layer to form a plurality of alignment structures in each abnormal alignment region; forming an alignment material layer on the substrate, the alignment material layer having a plurality of first alignment slits formed along the alignment structures in each of the abnormal alignment regions; and performing a rubbing alignment process to form a plurality of second alignment slits on the alignment material layer in each of the normal alignment regions along a alignment direction.

摘要翻译： TFT阵列基板的制造方法包括：提供基板; 在衬底上限定多个正常取向区域和多个异常对准区域; 在基板上形成绝缘层和透明导电层; 对所述绝缘层和所述透明导电层中的至少一个进行图案化处理，以在每个异常对准区域中形成多个对准结构; 在所述基板上形成取向材料层，所述取向材料层具有沿着所述异常取向区域中的取向结构形成的多个第一对准狭缝; 并且进行摩擦取向处理以沿着取向方向在每个正常取向区域中的取向材料层上形成多个第二对准狭缝。