公开(公告)号：US20240354266A1

公开(公告)日：2024-10-24

申请号：US18305679

申请日：2023-04-24

Applicant: Cirrus Logic International Semiconductor Ltd.

Inventor： Jack FULLER

IPC: G06F13/16 ,  G06F21/85

CPC classification number: G06F13/16 ,  G06F21/85 ,  G06F2213/0016

Abstract: In an example there is provided a configurable integrated circuit. The configurable integrated circuit comprises a configuration pin, configuration circuitry, and a controller. The configuration pin is for coupling with an external memory device. The configuration circuitry is to determine a resistance value between the configuration pin and a reference voltage. The controller configured to select a configuration mode for the integrated circuit based on the resistance value determined by the configuration circuitry. The configuration mode is one of an internal configuration mode in which the integrated circuit is configured based on data stored in the integrated circuit, and an external configuration mode in which the integrated circuit is configured based on data read from an external memory device coupled to the configuration pin.

公开(公告)号：US20220404407A1

公开(公告)日：2022-12-22

申请号：US17354237

申请日：2021-06-22

Applicant: Cirrus Logic International Semiconductor Ltd.

Inventor： Mehul MISTRY ,  Rupesh KHARE ,  Jack FULLER

IPC: G01R27/26 ,  G01R31/28

Abstract: Circuitry for detecting a capacitive load coupled between a first node and a second node, the circuitry comprising: drive circuitry for applying a first voltage to a first node over a first time period; processing circuitry configured to: measure a second voltage at the first node; and determine that the load is a capacitive load based on the second voltage.