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1.发明申请Calibrating analog-to-digital systems using a precision reference and a pulse-width modulation circuit to reduce local and large signal nonlinearities 有权使用精密参考和脉冲宽度调制电路校准模拟数字系统，以减少本地和大信号非线性公开(公告)号：US20050197796A1
公开(公告)日：2005-09-08
申请号：US11107342
申请日：2005-04-15
CPC分类号： H03M1/1028 , H03M1/12
摘要： A calibration unit and technique for calibrating A/D systems (e.g., data acquisition devices) using a pulse-width modulation (PWM) circuit to reduce nonlinearity. The calibration unit may be coupled to an analog-to-digital module (ADM) of the A/D system. The PWM circuit may generate a calibration signal with intentional ripple, which may exercise a region of a transfer curve of the ADM to reduce local nonlinearities in measurements associated with the calibration of the system. Pulse trains of varying frequency and duty cycle may be generated to sweep the PWM circuit through an ADM range and to calculate an ADM linearity correction function, which may be used to perform gain and offset correction with respect to a best-fit line through an ADM transfer curve to reduce large signal nonlinearities. The PWM circuit may include a resistor divider circuit including a plurality of taps to improve the ability to calibrate small input ranges.
摘要翻译： 用于使用脉冲宽度调制（PWM）电路校准A / D系统（例如，数据采集装置）以减少非线性的校准单元和技术。 校准单元可以耦合到A / D系统的模拟 - 数字模块（ADM）。 PWM电路可以产生具有有意的纹波的校准信号，其可以锻炼ADM的传递曲线的区域以减少与系统的校准相关联的测量中的局部非线性。 可产生变化频率和占空比的脉冲串，以扫描PWM电路通过ADM范围，并计算ADM线性校正功能，可用于通过ADM对最佳拟合线进行增益和偏移校正 传递曲线以减小大信号非线性。 PWM电路可以包括包括多个抽头的电阻分压器电路，以提高校准小输入范围的能力。
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2.发明申请公开(公告)号：US20050088229A1
公开(公告)日：2005-04-28
申请号：US11019008
申请日：2004-12-21
CPC分类号： H03F3/45475 , H03F3/211 , H03F3/45928 , H03F2200/228 , H03F2200/261 , H03F2200/447
摘要： A PGIA for use in measurement devices (e.g., data acquisition device) having improved dielectric absorption (DA) compensation and common mode rejection ratio (CMRR). When a step function is applied to an input of the PGIA, a first and a second DA compensation circuit may generate DA compensation signals derived from the step function. The DA compensation signals may combine with an original response of the PGIA to cancel some of the dielectric absorptions effects and improve the overall step response of the PGIA. An input stage of the PGIA may include a CMRR enhancement circuit to increase symmetry at the inputs of the PGIA. The CMRR enhancement circuit may delay an input signal received at a negative input terminal a particular amount such that it is in phase with an input signal received at a positive input terminal of the PGIA, to improve the CMRR.
摘要翻译： 用于具有改善的介电吸收（DA）补偿和共模抑制比（CMRR））的测量装置（例如，数据采集装置）的PGIA。 当对PGIA的输入施加阶梯函数时，第一和第二DA补偿电路可以生成从阶梯函数导出的DA补偿信号。 DA补偿信号可以与PGIA的原始响应相结合以消除一些介电吸收效应并改善PGIA的整体阶跃响应。 PGIA的输入级可以包括增加PGIA输入端的对称性的CMRR增强电路。 CMRR增强电路可以将在负输入端子处接收的输入信号延迟特定量，使得其与在PGIA的正输入端子处接收的输入信号同相，以改善CMRR。
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3.发明申请Programmable gain instrumentation amplifier including a composite amplifier for level shifting and improved signal-to-noise ratio 有权可编程增益仪表放大器，包括用于电平转换和改善信噪比的复合放大器公开(公告)号：US20050195027A1
公开(公告)日：2005-09-08
申请号：US11108357
申请日：2005-04-18
IPC分类号： H03G3/20
CPC分类号： H03G1/0088
摘要： A PGIA for use in measurement devices (e.g., data acquisition device) including a composite amplifier for level shifting and improved signal-to-noise ratio. The composite amplifier may level shift from a constant common mode voltage to a lower common mode voltage with a large voltage swing. The large output signal swing of the PGIA may allow excellent signal-to-noise ratio. Additionally, input op-amps of the PGIA may be bootstrapped so that their supply rails move according to an input signal of the PGIA. The PGIA may also include protection circuitry to protect components from damage, e.g., due to over-current conditions, and to keep all op-amps in proper closed loop operation. Furthermore, the PGIA may include DA compensation circuitry to cancel some dielectric absorptions effects and improve a step response of the PGIA and CMRR enhancement circuitry to increase symmetry at inputs of the PGIA and improve a CMRR associated with the PGIA.
摘要翻译： 用于测量装置（例如，数据采集装置）的PGIA，其包括用于电平移位的复合放大器和改善的信噪比。 复合放大器可以在具有较大的电压摆幅的情况下从恒定的共模电压电平转换到较低的共模电压。 PGIA的大输出信号摆幅可以提供优异的信噪比。 此外，PGIA的输入运算放大器可能会自举，以使其电源轨根据PGIA的输入信号移动。 PGIA还可以包括保护电路，以保护组件免受例如过电流状况的损坏，并保持所有运算放大器处于适当的闭环运行状态。 此外，PGIA可以包括DA补偿电路，以消除一些介电吸收效应，并改善PGIA和CMRR增强电路的阶跃响应，以增加PGIA输入端的对称性并改善与PGIA相关联的CMRR。
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4.发明授权Programmable gain instrumentation amplifier including a composite amplifier for level shifting and improved signal-to-noise ratio 有权可编程增益仪表放大器，包括用于电平转换和改善信噪比的复合放大器公开(公告)号：US07183854B2
公开(公告)日：2007-02-27
申请号：US11108357
申请日：2005-04-18
IPC分类号： H03G3/10
CPC分类号： H03G1/0088
摘要： A PGIA for use in measurement devices (e.g., data acquisition device) including a composite amplifier for level shifting and improved signal-to-noise ratio. The composite amplifier may level shift from a constant common mode voltage to a lower common mode voltage with a large voltage swing. The large output signal swing of the PGIA may allow excellent signal-to-noise ratio. Additionally, input op-amps of the PGIA may be bootstrapped so that their supply rails move according to an input signal of the PGIA. The PGIA may also include protection circuitry to protect components from damage, e.g., due to over-current conditions, and to keep all op-amps in proper closed loop operation. Furthermore, the PGIA may include DA compensation circuitry to cancel some dielectric absorptions effects and improve a step response of the PGIA and CMRR enhancement circuitry to increase symmetry at inputs of the PGIA and improve a CMRR associated with the PGIA.
摘要翻译： 用于测量装置（例如，数据采集装置）的PGIA，其包括用于电平移位的复合放大器和改善的信噪比。 复合放大器可以在具有较大的电压摆幅的情况下从恒定的共模电压电平转换到较低的共模电压。 PGIA的大输出信号摆幅可以提供优异的信噪比。 此外，PGIA的输入运算放大器可能会自举，以使其电源轨根据PGIA的输入信号移动。 PGIA还可以包括保护电路，以保护组件免受例如过电流状况的损坏，并保持所有运算放大器处于适当的闭环运行状态。 此外，PGIA可以包括DA补偿电路，以消除一些介电吸收效应，并改善PGIA和CMRR增强电路的阶跃响应，以增加PGIA输入端的对称性并改善与PGIA相关的CMRR。
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5.发明授权公开(公告)号：US07095280B2
公开(公告)日：2006-08-22
申请号：US11019008
申请日：2004-12-21
IPC分类号： H03F3/45
CPC分类号： H03F3/45475 , H03F3/211 , H03F3/45928 , H03F2200/228 , H03F2200/261 , H03F2200/447
摘要： A PGIA for use in measurement devices (e.g., data acquisition device) having improved dielectric absorption (DA) compensation and common mode rejection ratio (CMRR). When a step function is applied to an input of the PGIA, a first and a second DA compensation circuit may generate DA compensation signals derived from the step function. The DA compensation signals may combine with an original response of the PGIA to cancel some of the dielectric absorptions effects and improve the overall step response of the PGIA. An input stage of the PGIA may include a CMRR enhancement circuit to increase symmetry at the inputs of the PGIA. The CMRR enhancement circuit may delay an input signal received at a negative input terminal a particular amount such that it is in phase with an input signal received at a positive input terminal of the PGIA, to improve the CMRR.
摘要翻译： 用于具有改善的介电吸收（DA）补偿和共模抑制比（CMRR））的测量装置（例如，数据采集装置）的PGIA。 当对PGIA的输入施加阶梯函数时，第一和第二DA补偿电路可以生成从阶梯函数导出的DA补偿信号。 DA补偿信号可以与PGIA的原始响应相结合以消除一些介电吸收效应并改善PGIA的整体阶跃响应。 PGIA的输入级可以包括增加PGIA输入端的对称性的CMRR增强电路。 CMRR增强电路可以将在负输入端子处接收的输入信号延迟特定量，使得其与在PGIA的正输入端子处接收的输入信号同相，以改善CMRR。
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6.发明授权Calibrating analog-to-digital systems using a precision reference and a pulse-width modulation circuit to reduce local and large signal nonlinearities 有权使用精密参考和脉冲宽度调制电路校准模拟数字系统，以减少本地和大信号非线性公开(公告)号：US07146283B2
公开(公告)日：2006-12-05
申请号：US11107342
申请日：2005-04-15
IPC分类号： H03M1/10
CPC分类号： H03M1/1028 , H03M1/12
摘要： A calibration unit and technique for calibrating A/D systems (e.g., data acquisition devices) using a pulse-width modulation (PWM) circuit to reduce nonlinearity. The calibration unit may be coupled to an analog-to-digital module (ADM) of the A/D system. The PWM circuit may generate a calibration signal with intentional ripple, which may exercise a region of a transfer curve of the ADM to reduce local nonlinearities in measurements associated with the calibration of the system. Pulse trains of varying frequency and duty cycle may be generated to sweep the PWM circuit through an ADM range and to calculate an ADM linearity correction function, which may be used to perform gain and offset correction with respect to a best-fit line through an ADM transfer curve to reduce large signal nonlinearities. The PWM circuit may include a resistor divider circuit including a plurality of taps to calibrate small input ranges.
摘要翻译： 用于使用脉冲宽度调制（PWM）电路校准A / D系统（例如，数据采集装置）以减少非线性的校准单元和技术。 校准单元可以耦合到A / D系统的模拟 - 数字模块（ADM）。 PWM电路可以产生具有有意的纹波的校准信号，其可以锻炼ADM的传递曲线的区域以减少与系统的校准相关联的测量中的局部非线性。 可产生变化频率和占空比的脉冲串，以扫描PWM电路通过ADM范围，并计算ADM线性校正功能，可用于通过ADM对最佳拟合线进行增益和偏移校正 传递曲线以减小大信号非线性。 PWM电路可以包括电阻分压器电路，其包括用于校准小输入范围的多个抽头。
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