摘要:
An apparatus, program product and method to dynamically control the bindings between Input/Output Adaptors (IOA's) and Input/Output Processors (IOP's) in a hierarchical I/O interface of a computer, such that an IOA can be dynamically reassigned from one IOP to another IOP such that the latter IOP takes over management of data transfer between the processing complex of the computer and the IOA from the former IOP. At least partial system availability is maintained in the computer during dynamic reassignment to minimize system downtime and simplify maintenance operations on the computer.
摘要:
A resource and partition manager of the preferred embodiments includes a lock mechanism that operates on a plurality of locks that control access to individual I/O slots. The resource and partition manager uses the lock mechanism to obtain a lock on an I/O slot when transferring control of the I/O slot to a logical partition that is powering on and when removing the I/O slot from a logical partition that is powering off. The resource and partition manager uses the lock mechanism to remove control of an I/O slot from, or return control to, an operating logical partition in order to facilitate hardware service operations on that I/O slot or on the physical enclosure in which it is contained.
摘要:
A resource and partition manager includes a power on/power off mechanism that is used to assure a hardware resource is powered down when control of the resource is removed from a logical partition, and to assure the hardware resource is powered up when control of the hardware resource is transferred to a logical partition. In the alternative, the resource and partition manager may simply place the hardware resource in a power on reset state when the hardware resource is transferred to a logical partition. In this manner, when made available to a partition, the hardware resource is in a power-on reset state, which is the state typically expected by the logical partition.
摘要:
A resource and partition manager of the preferred embodiments includes a lock mechanism that operates on a plurality of locks that control access to individual I/O slots. The resource and partition manager uses the lock mechanism to obtain a lock on an I/O slot when transferring control of the I/O slot to a logical partition that is powering on and when removing the I/O slot from a logical partition that is powering off. The resource and partition manager uses the lock mechanism to remove control of an I/O slot from, or return control to, an operating logical partition in order to facilitate hardware service operations on that I/O slot or on the physical enclosure in which it is contained.
摘要:
A resource and partition manager of the preferred embodiments includes a lock mechanism that operates on a plurality of locks that control access to individual I/O slots. The resource and partition manager uses the lock mechanism to obtain a lock on an I/O slot when transferring control of the I/O slot to a logical partition that is powering on and when removing the I/O slot from a logical partition that is powering off. The resource and partition manager uses the lock mechanism to remove control of an I/O slot from, or return control to, an operating logical partition in order to facilitate hardware service operations on that I/O slot or on the physical enclosure in which it is contained.
摘要:
A resource and partition manager of the preferred embodiments includes a lock mechanism that operates on a plurality of locks that control access to individual hardware resources. The resource and partition manager uses the lock mechanism to obtain a lock on a hardware resource when transferring control of the hardware resource to a logical partition that is powering on and when removing the hardware resource from a logical partition that is powering off. The resource and partition manager uses the lock mechanism to remove control of a hardware resource from, or return control to, an operating logical partition in order to facilitate hardware service operations on that hardware resource or on the physical enclosure in which it is contained.
摘要:
Method, apparatus and system for isolating input/output adapter error domains in a data processing system. Errors occurring in one input/output adapter are isolated from other input/output adapters of the data processing system by functionality in a host bridge that connects the input/output adapters to a system bus of the data processing system, thus permitting the use of low cost, industry standard switches and bridges external to the host bridge.
摘要:
Methods, systems, and articles of manufacture for communicating with an I/O processor (IOP) are provided. Polling of message queue pointers is utilized to detect the occurrence of certain message queue related events, rather than rely on interrupts generated by the IOP. The polling may decrease the disruptive effects of IOP generated interrupts. In an effort to minimize the latency associated with detecting IOP related events, the polling may be initiated frequently by an operating system task dispatcher. In an effort to minimize context switches, the task dispatcher may schedule the processing of upstream messages detected while polling to coincide with naturally occurring task swaps.
摘要:
A method, which may be embodied upon a computer readable medium and executed by a processor, for PCI IO using PCI device memory mapping in a logically partitioned system. The method may include the steps of detecting PCI devices in a bus walk initialization process, and associating a pseudonym address range with each PCI device detected in the bus walk initialization process. The method may further include updating PCI device IO resources for each PCI device detected with the associated pseudonym address range, and accessing the detected PCI devices with a device driver using the pseudonym address range stored in the PCI device IO resources.
摘要:
An apparatus, system and method permitting a variety of reset procedures and corresponding reset states. A device reset control register is provided for each I/O device adapter in single function or multifunction devices. The device reset control registers permit a greater degree of control over single function devices, multifunction device as a whole and individual device functions within a multifunction device. A device immediate status register synchronizes the various reset procedures. A logical power on reset procedure, a directed unit reset procedure and a directed interface reset procedure utilize the greater degree of control that the device reset control registers provide to force the I/O device adapter, single function device or multifunction device into a corresponding logical power on reset state, a directed unit reset state or a directed interface reset state. Each of these reset states is well-defined and has the advantage of predictable behavior during and after execution of the corresponding reset procedure. A built-in self-test procedure is also defined that sequentially examines each function associated within a multifunction device connected to the local bus to coordinate the initiation, execution and completion of built in self-tests.