METHOD OF PROCESSING WAFER
    1.
    发明公开

    公开(公告)号:US20230420221A1

    公开(公告)日:2023-12-28

    申请号:US18335509

    申请日:2023-06-15

    Inventor: Yu ZHAO

    CPC classification number: H01J37/32394 H01L21/78 H01L21/3065 H01J2237/334

    Abstract: A wafer has a substrate and a functional layer disposed on the substrate along a plurality of projected dicing lines. A method of processing the wafer includes applying a laser beam to the wafer along the projected dicing lines to remove portions of the functional layer, forming processed grooves in the functional layer through which the substrate is exposed, removing damaged regions produced in an interface between the substrate and the functional layer by the laser beam, and forming recesses extending outwardly from side surfaces of the processed grooves, a recess exposing step of removing portions of the functional layer that overhang the recesses, thereby exposing the recesses, and processing the substrate along the projected dicing line after the recess exposing step has been carried out.

    CHIP MANUFACTURING METHOD
    2.
    发明公开

    公开(公告)号:US20230298939A1

    公开(公告)日:2023-09-21

    申请号:US18178794

    申请日:2023-03-06

    Inventor: Yu ZHAO

    CPC classification number: H01L21/78 H01L21/268 H01L21/3065

    Abstract: After damaged portions in the vicinity of side surfaces and bottom surfaces of grooves formed in a groove forming step are removed in a first plasma etching step, the side surfaces of the grooves are coated with a second protective film formed in a second coating step. As a result, in a dividing step in which the wafer is subjected to plasma etching, undercut which would progress from the side surfaces of the grooves can be prevented.

    MANUFACTURING METHOD OF CHIPS
    3.
    发明公开

    公开(公告)号:US20240112955A1

    公开(公告)日:2024-04-04

    申请号:US18467860

    申请日:2023-09-15

    Inventor: Yu ZHAO

    CPC classification number: H01L21/78 H01L21/30655 H01L21/3081

    Abstract: Provided is a manufacturing method of a plurality of chips by dividing a workpiece that is defined into a plurality of regions by scribe lines. The manufacturing method includes the following steps of forming a mask by supplying a plasmatic deposition gas to a side of a front surface or a side of a back surface of the workpiece, forming cut grooves, with the mask being removed along the scribe lines, by causing a cutting blade to cut into the workpiece at a predetermined cut-in depth along the scribe lines on a side of the surface on which the mask has been formed, and then removing the workpiece along the scribe lines to divide the workpiece into the chips by applying plasma etching to the workpiece while supplying a plasmatic etching gas to the side of the surface of the workpiece in which the cut grooves have been formed.

    MANUFACTURING METHOD OF CHIPS
    4.
    发明公开

    公开(公告)号:US20230377940A1

    公开(公告)日:2023-11-23

    申请号:US18321411

    申请日:2023-05-22

    Inventor: Yu ZHAO Shin TABATA

    Abstract: There is provided a manufacturing method of chips in which a wafer segmented into a plurality of regions by a plurality of planned dividing lines set in a lattice manner is divided to manufacture the chips. The manufacturing method of chips includes a groove forming step of holding the wafer including a first surface and a second surface by a holding table and forming grooves having a depth smaller than a thickness of the wafer along the planned dividing lines on the side of the first surface of the wafer, a first protective film coating step of coating the first surface of the wafer and side surfaces of the grooves with a first protective film, and a dividing step of dividing the wafer along the planned dividing lines. Plasma etching is executed for the wafer from the side of the first surface in the dividing step.

Patent Agency Ranking