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    Drop generator
    2.
    发明申请
    Drop generator 有权
    掉落发电机

    公开(公告)号：US20080074478A1

    公开(公告)日：2008-03-27

    申请号：US11524605

    申请日：2006-09-21

    申请人： James M. Stevenson ,  Bradley J. Gerner ,  Dan L. Massopust

    发明人： James M. Stevenson ,  Bradley J. Gerner ,  Dan L. Massopust

    IPC分类号： B41J2/175

    CPC分类号： B41J2/14233 ,  B41J2/161 ,  B41J2/1634

    摘要： A drop generator including a fluid channel substructure having a pressure chamber and an inlet formed therein, a diaphragm layer overlying the fluid channel substructure, a transducer substructure attached to the diaphragm layer, and an ink feed aperture formed in the diaphragm layer.

    摘要翻译： 一种液滴发生器，包括具有压力室和形成在其中的入口的流体通道子结构，覆盖流体通道子结构的隔膜层，附着到隔膜层的换能器子结构以及形成在隔膜层中的供墨孔。

    Drop generator
    3.
    发明授权
    Drop generator 有权
    掉落发电机

    公开(公告)号：US07665828B2

    公开(公告)日：2010-02-23

    申请号：US11524605

    申请日：2006-09-21

    申请人： James M. Stevenson ,  Bradley J. Gerner ,  Dan L. Massopust

    发明人： James M. Stevenson ,  Bradley J. Gerner ,  Dan L. Massopust

    IPC分类号： B41J2/045

    CPC分类号： B41J2/14233 ,  B41J2/161 ,  B41J2/1634

    摘要： A drop generator including a fluid channel substructure having a pressure chamber and an inlet formed therein, a diaphragm layer overlying the fluid channel substructure, a transducer substructure attached to the diaphragm layer, and an ink feed aperture formed in the diaphragm layer.

    摘要翻译： 一种液滴发生器，包括具有压力室和形成在其中的入口的流体通道子结构，覆盖流体通道子结构的隔膜层，附着到隔膜层的换能器子结构以及形成在隔膜层中的供墨孔。

    Clock distribution apparatus and processes particularly useful in multiprocessor systems
    4.
    发明授权
    Clock distribution apparatus and processes particularly useful in multiprocessor systems 失效
    时钟分配装置和处理在多处理器系统中特别有用

    公开(公告)号：US5293626A

    公开(公告)日：1994-03-08

    申请号：US536270

    申请日：1990-06-08

    申请人： Edward C. Priest ,  Steven C. Barber ,  Ken Shintaku ,  David A. Hanson ,  Dan L. Massopust

    发明人： Edward C. Priest ,  Steven C. Barber ,  Ken Shintaku ,  David A. Hanson ,  Dan L. Massopust

    IPC分类号： G06F1/10 ,  H04J3/06 ,  G06F13/00

    CPC分类号： G06F1/10 ,  G06F1/105 ,  H04J3/0626

    摘要： Clock pulses from a master oscillator are distributed in a multiprocessor computer system so that they arrive at a large number of utilization points located in operating clusters of modules within extremely tight time tolerances of each other. The delays associated with each component, electrical or optical connection, cable or the like are determined by direct measurement or by using known standard characteristics. A time delay budget for each complete clock pulse path from the point of initial divergence from the master clock source to the final chip delivery point is logged and summed. Components capable of introducing predetermined amounts of time delay are incorporated in some or all clock pulse paths. These components are adjusted so as to balance out the differences determined from the clock path budgets. The clock paths are implemented in electrical components either alone or in combination with optical components, or in substantially all optical configurations. One arrangement for controlling optical skew includes an arrangement of optical elements physically displaceable in a coaxial direction relative to one another. Skew adjustment networks employ a unique composition of coarse and fine selectable delay arrays implemented either by electrical components, optical components, or a combination thereof.

    摘要翻译： 来自主振荡器的时钟脉冲被分布在多处理器计算机系统中，使得它们在彼此极其紧密的时间容限内到达位于模块的操作簇中的大量利用点。 通过直接测量或通过使用已知的标准特性来确定与每个组件，电气或光学连接，电缆等相关联的延迟。 对从主时钟源到最终芯片传送点的初始发散点的每个完整时钟脉冲路径的延时预算进行记录和求和。 能够引入预定量的时间延迟的组件被并入一些或所有时钟脉冲路径中。 调整这些组件以平衡从时钟路径预算确定的差异。 时钟路径单独地或与光学组件组合地实现在电气部件中，或者在基本上所有的光学配置中实现。 用于控制光学偏斜的一种布置包括可以相对于彼此在同轴方向物理上移位的光学元件的布置。 倾斜调整网络采用由电气部件，光学部件或其组合实现的粗略和精细可选延迟阵列的独特组合。