公开(公告)号：US20240138066A1

公开(公告)日：2024-04-25

申请号：US18483929

申请日：2023-10-09

申请人： Murata Manufacturing Co., Ltd.

发明人： Yoshihito OTSUBO ,  Hideo NAKAGOSHI ,  Hiroki YOSHIMORI

IPC分类号： H05K1/14 ,  H05K1/02

CPC分类号： H05K1/144 ,  H05K1/0203 ,  H05K2201/0379 ,  H05K2201/10507 ,  H05K2201/10977

摘要： An upper circuit board body has a first upper main surface and a first lower main surface. A lower circuit board body has a second upper main surface and a second lower main surface. A lower circuit board first mounting electrode and one or more lower circuit board second mounting electrodes are disposed on the second upper main surface. A first component is mounted on the one or more lower circuit board second mounting electrodes. A first conductor member is mounted on the lower circuit board first mounting electrode and is disposed on the left of the first component. A second conductor member is disposed on the first lower main surface, is connected to the upper end of the first conductor member, and overlaps at least a part of the first component as viewed in the downward direction.

公开(公告)号：US11877485B2

公开(公告)日：2024-01-16

申请号：US17315456

申请日：2021-05-10

申请人： Samsung Display Co., Ltd.

发明人： Chung-seok Lee ,  Joonsam Kim ,  Chulho Jung

IPC分类号： H01L27/12 ,  H01K1/14 ,  H01L23/34 ,  H10K59/131 ,  H05K1/14 ,  H05K1/11 ,  H01L23/544 ,  H05K1/02 ,  H10K59/123 ,  H10K59/124 ,  H10K59/121 ,  H01L23/00 ,  H10K102/00

CPC分类号： H10K59/131 ,  H01L23/544 ,  H01L27/1262 ,  H05K1/0271 ,  H05K1/118 ,  H05K1/147 ,  H10K59/123 ,  H10K59/124 ,  H10K59/1213 ,  H01L24/29 ,  H01L24/32 ,  H01L27/124 ,  H01L27/1248 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/54486 ,  H01L2224/2929 ,  H01L2224/32227 ,  H01L2924/1304 ,  H05K2201/041 ,  H05K2201/09136 ,  H05K2201/09781 ,  H05K2201/10128 ,  H05K2201/10977 ,  H05K2203/166 ,  H10K2102/351 ,  H01L2924/00012

摘要： Provided is an electronic device including a display panel including a base substrate, pixels, a first insulation layer, and panel pads spaced along a first direction from pixels and each arranged along a second direction crossing the first direction, a circuit board disposed on the display panel and connected to panel pads, and an adhesive interconnect layer disposed between the display panel and the circuit board and electrically connecting the display panel and the circuit board. The circuit board includes a flexible substrate including a top surface facing the base substrate, output pads disposed on the flexible substrate and connected to panel pads, each obliquely extending in the first and second directions and arranged along the second direction, an alignment pad spaced along the second direction from output pads, and a stress relaxation pad disposed between output pads and alignment pads and electrically insulated from panel pads.

公开(公告)号：US20230354523A1

公开(公告)日：2023-11-02

申请号：US18220026

申请日：2023-07-10

申请人： Amkor Technology Singapore Holding Pte. Ltd.

发明人： Akito Yoshida ,  Mahmoud Dreiza ,  Curtis Michael Zwenger

IPC分类号： H05K1/14 ,  H01L23/31 ,  H01L23/00 ,  H05K1/11 ,  H05K1/18 ,  H05K3/30 ,  H05K3/34 ,  H01L21/56 ,  H01L23/498 ,  H05K3/36 ,  H05K3/40

CPC分类号： H05K1/14 ,  H01L23/3128 ,  H01L24/10 ,  H05K1/11 ,  H05K1/181 ,  H05K1/184 ,  H05K3/303 ,  H05K3/34 ,  H01L21/56 ,  H01L23/3107 ,  H01L23/49811 ,  H01L24/16 ,  H01L24/81 ,  H05K1/185 ,  H05K3/363 ,  H05K3/4007 ,  Y10T29/49165 ,  H01L2224/1191 ,  H01L23/3171 ,  H05K3/3436 ,  H01L2224/13021 ,  H01L2224/13022 ,  H05K2201/10515 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/16111 ,  H05K2201/10977 ,  H05K2203/043 ,  H01L2224/16055 ,  H01L2224/1607 ,  H01L2224/16113 ,  H01L2224/16238 ,  H01L2224/81815 ,  H01L2924/01029 ,  H01L2924/01079

摘要： A stackable via package includes a substrate having an upper surface and a trace on the upper surface, the trace including a terminal. A solder ball is on the terminal. The solder ball has a solder ball diameter A and a solder ball height D. A via aperture is formed in a package body enclosing the solder ball to expose the solder ball. The via aperture includes a via bottom having a via bottom diameter B and a via bottom height C from the upper surface of the substrate, where A

公开(公告)号：US11792941B2

公开(公告)日：2023-10-17

申请号：US17460458

申请日：2021-08-30

申请人： ImberaTek LLC

发明人： Risto Tuominen ,  Antti Iihola ,  Petteri Palm

IPC分类号： H05K3/06 ,  H01L21/48 ,  H01L23/13 ,  H01L23/538 ,  H01L23/544 ,  H01L23/00 ,  H05K1/18 ,  H05K3/28 ,  H05K3/30 ,  H05K3/32 ,  H01L21/56 ,  H05K3/20 ,  H05K3/40

CPC分类号： H05K3/064 ,  H01L21/4846 ,  H01L21/56 ,  H01L23/13 ,  H01L23/5389 ,  H01L23/544 ,  H01L24/16 ,  H01L24/24 ,  H01L24/82 ,  H01L24/83 ,  H05K1/183 ,  H05K1/187 ,  H05K1/188 ,  H05K3/284 ,  H05K3/303 ,  H05K3/305 ,  H05K3/321 ,  H01L21/568 ,  H01L24/81 ,  H01L24/90 ,  H01L2223/54426 ,  H01L2223/54473 ,  H01L2224/04105 ,  H01L2224/16 ,  H01L2224/18 ,  H01L2224/24227 ,  H01L2224/293 ,  H01L2224/2929 ,  H01L2224/81121 ,  H01L2224/81132 ,  H01L2224/81192 ,  H01L2224/81203 ,  H01L2224/81205 ,  H01L2224/81801 ,  H01L2224/82039 ,  H01L2224/83132 ,  H01L2224/83192 ,  H01L2224/83203 ,  H01L2224/83205 ,  H01L2224/83851 ,  H01L2224/9211 ,  H01L2224/92144 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01018 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/07802 ,  H01L2924/07811 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/1434 ,  H01L2924/1461 ,  H01L2924/1517 ,  H01L2924/15153 ,  H05K3/205 ,  H05K3/32 ,  H05K3/4069 ,  H05K2201/0355 ,  H05K2201/0969 ,  H05K2201/09563 ,  H05K2201/10674 ,  H05K2201/10977 ,  H05K2203/0353 ,  H05K2203/063 ,  H05K2203/0723 ,  Y02P70/50 ,  Y10T29/4913 ,  H01L2924/00011 ,  H01L2224/29075 ,  H01L2224/83851 ,  H01L2924/00014 ,  H01L2224/2929 ,  H01L2924/00014 ,  H01L2224/293 ,  H01L2924/00014 ,  H01L2924/07802 ,  H01L2924/00 ,  H01L2924/1461 ,  H01L2924/00 ,  H01L2924/12042 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2224/0401 ,  H01L2924/00011 ,  H01L2224/0401

摘要： The present publication discloses a circuit-board structure, including a conductor layer on an insulating material layer, and a conductor pattern on top of the conductor foil. A component is attached to the conductor foil and the conductor pattern, the component embedded at least in part in adhesive which attaches the component to the insulating material layer. A recess is formed in the conductor foil and the insulating material layer, and contact openings are in the insulating material layer at locations of contact areas of the component. Conductor material of the conductor foil is not present outside the conductor pattern, and the conductor foil is located between the conductor pattern and the insulating material layer.

公开(公告)号：US20190182958A1

公开(公告)日：2019-06-13

申请号：US16281045

申请日：2019-02-20

申请人： Intel Corporation

发明人： Damion SEARLS ,  Weston C. ROTH ,  Margaret D. RAMIREZ ,  James D. JACKSON ,  Rainer E. THOMAS ,  Charles A. GEALER

IPC分类号： H05K1/18 ,  H01L23/498 ,  H01L21/56 ,  H01L25/03

CPC分类号： H05K1/181 ,  H01L21/563 ,  H01L23/49827 ,  H01L23/552 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/03 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73203 ,  H01L2224/73265 ,  H01L2225/06562 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01057 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/3025 ,  H05K3/284 ,  H05K2201/10515 ,  H05K2201/10674 ,  H05K2201/10734 ,  H05K2201/10977 ,  Y02P70/611 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/0401 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Disclosed are embodiments of a system-level assembly including an integrated circuit (IC) die directly attached to a mainboard. An IC die directly attached to a mainboard or other circuit board may be referred to as a direct-chip attach (DCA) die. A package is disposed over at least a portion of the DCA die and coupled with the mainboard. The package includes one or more other IC die disposed on a substrate. Other embodiments are described and claimed.

公开(公告)号：US20180229333A1

公开(公告)日：2018-08-16

申请号：US15872954

申请日：2018-01-16

申请人： Panasonic Intellectual Property Management Co., Ltd.

发明人： HIROHISA HINO ,  NAOMICHI OHASHI ,  YASUHIRO SUZUKI

IPC分类号： B23K35/02 ,  H05K3/34 ,  B23K35/26 ,  C08L63/10 ,  B23K35/362 ,  B23K101/42

CPC分类号： B23K35/025 ,  B23K35/264 ,  B23K35/362 ,  B23K2101/42 ,  C08G59/4207 ,  C08L63/00 ,  C08L63/10 ,  H05K3/225 ,  H05K3/3442 ,  H05K3/3463 ,  H05K3/3484 ,  H05K3/3489 ,  H05K2201/0133 ,  H05K2201/10977 ,  C08K5/08

摘要： Provided herein are a solder paste and a mount structure having excellent repairability while maintaining high adhesion at the operating temperature of a semiconductor component. The solder paste is configured from a solder powder and a flux. The flux contains an epoxy resin, a curing agent, a rubber modified epoxy resin, and an organic acid. The rubber modified epoxy resin is contained in a proportion of 3 weight % to 35 weight % with respect to the total weight of the flux.

公开(公告)号：US20180207673A1

公开(公告)日：2018-07-26

申请号：US15869645

申请日：2018-01-12

申请人： ALPS ELECTRIC CO., LTD.

发明人： Younggil CHOI ,  Boseok SEOK

IPC分类号： B05C11/02 ,  B05C5/02 ,  H05K3/00

CPC分类号： B05C11/02 ,  B05C5/0212 ,  H05K3/0091 ,  H05K3/284 ,  H05K2201/09909 ,  H05K2201/10977 ,  H05K2203/0759

摘要： Disclosed herein is a printed circuit board having a structure for preventing coating liquid overflow. In the printed circuit board on which an electronic component is mounted and in which a connection hole for joining the electronic component and another component to each other is formed, a land region to which lead may be applied is formed adjacent to the connection hole.

公开(公告)号：US20180204815A1

公开(公告)日：2018-07-19

申请号：US15917962

申请日：2018-03-12

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Hao-Cheng Hou ,  Yu-Feng Chen ,  Jung Wei Cheng ,  Yu-Min Liang ,  Tsung-Ding Wang

IPC分类号： H01L23/00 ,  H01L21/56 ,  H01L23/13 ,  H01L23/498 ,  H05K3/34

CPC分类号： H01L24/17 ,  H01L21/563 ,  H01L23/13 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/11 ,  H01L24/81 ,  H01L2224/16113 ,  H01L2224/16227 ,  H01L2224/81805 ,  H01L2924/00011 ,  H01L2924/01029 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/15151 ,  H01L2924/181 ,  H05K3/3436 ,  H05K2201/09072 ,  H05K2201/10977 ,  Y02P70/613 ,  H01L2924/00

摘要： In some embodiments, a package substrate for a semiconductor device includes a substrate core and a material layer disposed over the substrate core. The package substrate includes a spot-faced aperture disposed in the substrate core and the material layer.

公开(公告)号：US10002825B2

公开(公告)日：2018-06-19

申请号：US15625083

申请日：2017-06-16

申请人： Siliconware Precision Industries Co., Ltd.

发明人： Shih-Chao Chiu ,  Chun-Hsien Lin ,  Yu-Cheng Pai ,  Wei-Chung Hsiao ,  Ming-Chen Sun ,  Tzu-Chieh Shen ,  Chia-Cheng Chen

IPC分类号： H01L23/498 ,  H05K1/18 ,  H01L23/538 ,  H05K3/00 ,  H01L21/683 ,  H05K3/32 ,  H05K3/10 ,  H01L23/00 ,  H05K1/02 ,  H05K3/46 ,  H01L23/31

CPC分类号： H01L23/49838 ,  H01L21/6835 ,  H01L23/3121 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L2221/68318 ,  H01L2221/68345 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/26175 ,  H01L2224/2919 ,  H01L2224/32058 ,  H01L2224/32105 ,  H01L2224/32106 ,  H01L2224/32237 ,  H01L2224/73204 ,  H01L2224/81801 ,  H01L2224/83101 ,  H01L2924/15313 ,  H01L2924/18161 ,  H01L2924/19041 ,  H01L2924/19103 ,  H01L2924/19104 ,  H05K1/0231 ,  H05K1/185 ,  H05K1/186 ,  H05K1/189 ,  H05K3/0026 ,  H05K3/007 ,  H05K3/108 ,  H05K3/32 ,  H05K3/4682 ,  H05K2201/0376 ,  H05K2201/10515 ,  H05K2201/1053 ,  H05K2201/10674 ,  H05K2201/10977 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/0665

摘要： The present invention provides a package structure with an embedded electronic component and a method of fabricating the package structure. The method includes: forming a first wiring layer on a carrier; removing the carrier and forming the first wiring layer on a bonding carrier; disposing an electronic component on the first wiring layer; forming an encapsulating layer, a second wiring layer and an insulating layer on the first wiring layer; disposing a chip on the electronic component and the second wiring layer; and forming a covering layer that covers the chip. The present invention can effectively reduce the thickness of the package structure and the electronic component without using adhesives.

公开(公告)号：US09995977B2

公开(公告)日：2018-06-12

申请号：US15318532

申请日：2015-06-19

申请人： SHARP KABUSHIKI KAISHA

发明人： Masaki Nakayama ,  Motoji Shiota ,  Takashi Matsui ,  Yasuhiko Tanaka ,  Hiroki Miyazaki

IPC分类号： G02F1/1345 ,  H05K1/18 ,  H05K1/02 ,  H01L23/498 ,  H01L23/31

CPC分类号： G02F1/13452 ,  G02F1/13454 ,  H01L23/3142 ,  H01L23/49811 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/0002 ,  H01L2924/3511 ,  H05K1/0271 ,  H05K1/028 ,  H05K1/0306 ,  H05K1/181 ,  H05K3/305 ,  H05K3/323 ,  H05K2201/09781 ,  H05K2201/10136 ,  H05K2201/10204 ,  H05K2201/10734 ,  H05K2201/10977 ,  H05K2201/10984 ,  Y02P70/613 ,  H01L2924/00

摘要： An array circuit board 11B includes a glass substrate, an IC chip 20, two ACFs 30, and a resin film 32. The IC chip 20 is disposed on the glass substrate. The ACFs 30 are disposed between the glass substrate and the IC chip 20 for electrically connecting the glass substrate and the IC chip 20 together. The ACFs 30 are separated from each other. The resin film 32 is made of resin material having cure shrinkage smaller than the ACFs 30 and disposed to fill a gap between the ACFs 30 adjacent to each other between the glass substrate and the IC chip 20.