公开(公告)号：US20070216042A1

公开(公告)日：2007-09-20

申请号：US11472693

申请日：2006-06-21

申请人： Daniel Delprat ,  Eric Neyret ,  Oleg Kononchuk ,  Patrick Reynaud ,  Michael Stinco

发明人： Daniel Delprat ,  Eric Neyret ,  Oleg Kononchuk ,  Patrick Reynaud ,  Michael Stinco

IPC分类号： H01L21/322

CPC分类号： H01L21/02032 ,  H01L21/76254

摘要： This invention provides methods for manufacturing compound-material wafers and methods for recycling donor substrates that results from manufacturing compound-material wafers. The provided methods includes at least one further thermal treatment step configured to at least partially reduce oxygen precipitates and/or nuclei. Reduction of oxygen precipitates and/or nuclei, improves the recycling rate of the donor substrate.

摘要翻译： 本发明提供了用于制造复合材料晶片的方法以及由制造复合材料晶片产生的用于再循环施主衬底的方法。 所提供的方法包括至少一个另外的热处理步骤，其被配置为至少部分地减少氧沉淀物和/或核。 减少氧沉淀物和/或核，提高了供体底物的再循环率。

公开(公告)号：US07405136B2

公开(公告)日：2008-07-29

申请号：US11472693

申请日：2006-06-21

申请人： Daniel Delprat ,  Eric Neyret ,  Oleg Kononchuk ,  Patrick Reynaud ,  Michael Stinco

发明人： Daniel Delprat ,  Eric Neyret ,  Oleg Kononchuk ,  Patrick Reynaud ,  Michael Stinco

IPC分类号： H01L21/30

CPC分类号： H01L21/02032 ,  H01L21/76254

摘要： This invention provides methods for manufacturing compound-material wafers and methods for recycling donor substrates that results from manufacturing compound-material wafers. The provided methods includes at least one further thermal treatment step configured to at least partially reduce oxygen precipitates and/or nuclei. Reduction of oxygen precipitates and/or nuclei, improves the recycling rate of the donor substrate.

摘要翻译： 本发明提供了用于制造复合材料晶片的方法以及由制造复合材料晶片产生的用于再循环施主衬底的方法。 所提供的方法包括至少一个另外的热处理步骤，其被配置为至少部分地减少氧沉淀物和/或核。 减少氧沉淀物和/或核，提高了供体底物的再循环率。

公开(公告)号：US07736994B2

公开(公告)日：2010-06-15

申请号：US11850481

申请日：2007-09-05

申请人： Patrick Reynaud ,  Oleg Kononchuk ,  Michael Stinco

发明人： Patrick Reynaud ,  Oleg Kononchuk ,  Michael Stinco

IPC分类号： H01L21/30

CPC分类号： H01L21/31662 ,  H01L21/02032 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/76254 ,  Y10T428/8305

摘要： The invention relates to a method for manufacturing compound material wafers, in particular, silicon on insulator type wafers, by providing an initial donor substrate, forming an insulating layer over the initial donor substrate, forming a predetermined splitting area in the initial donor substrate, attaching the initial donor substrate onto a handle substrate and detaching the donor substrate at the predetermined splitting area, thereby transferring a layer of the initial donor substrate onto the handle substrate to form a compound material wafer. In order to be able to reuse the donor substrate more often, the invention proposes to carry out the thermal treatment step to form the insulating layer at a temperature of less than 950° C., in particular, less than 900° C., and preferably at 850° C. The invention also relates to a silicon on insulator type wafer manufactured according to the inventive method.

摘要翻译： 本发明涉及通过提供初始施主衬底，在初始施主衬底上形成绝缘层，在初始施主衬底中形成预定的分裂区域，附着在一起制造复合材料晶片，特别是绝缘体上硅晶片的方法 将初始施主衬底放置在手柄衬底上并在预定的分割区域分离施主衬底，从而将初始施主衬底的一层转移到手柄衬底上以形成复合材料晶片。 为了能够更经常地再次使用供体衬底，本发明提出进行热处理步骤以在小于950℃，特别是小于900℃的温度下形成绝缘层，以及 优选在850℃。本发明还涉及根据本发明方法制造的绝缘体上硅晶片。

公开(公告)号：US20080176380A1

公开(公告)日：2008-07-24

申请号：US11850481

申请日：2007-09-05

申请人： Patrick Reynaud ,  Oleg Kononchuk ,  Michael Stinco

发明人： Patrick Reynaud ,  Oleg Kononchuk ,  Michael Stinco

IPC分类号： H01L21/46 ,  B32B9/04

CPC分类号： H01L21/31662 ,  H01L21/02032 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/76254 ,  Y10T428/8305

摘要： The invention relates to a method for manufacturing compound material wafers, in particular, silicon on insulator type wafers, by providing an initial donor substrate, forming an insulating layer over the initial donor substrate, forming a predetermined splitting area in the initial donor substrate, attaching the initial donor substrate onto a handle substrate and detaching the donor substrate at the predetermined splitting area, thereby transferring a layer of the initial donor substrate onto the handle substrate to form a compound material wafer. In order to be able to reuse the donor substrate more often, the invention proposes to carry out the thermal treatment step to form the insulating layer at a temperature of less than 950° C., in particular, less than 900° C., and preferably at 850° C. The invention also relates to a silicon on insulator type wafer manufactured according to the inventive method.

摘要翻译： 本发明涉及通过提供初始施主衬底，在初始施主衬底上形成绝缘层，在初始施主衬底中形成预定的分裂区域，附着在一起制造复合材料晶片，特别是绝缘体上硅晶片的方法 将初始施主衬底放置在手柄衬底上并在预定的分割区域分离施主衬底，从而将初始施主衬底的一层转移到手柄衬底上以形成复合材料晶片。 为了能够更经常地再次使用供体衬底，本发明提出进行热处理步骤以在小于950℃，特别是小于900℃的温度下形成绝缘层，以及 优选在850℃。本发明还涉及根据本发明方法制造的绝缘体上硅晶片。

公开(公告)号：US07413964B2

公开(公告)日：2008-08-19

申请号：US11481691

申请日：2006-07-05

申请人： Patrick Reynaud ,  Oleg Kononchuk ,  Christophe Maleville

发明人： Patrick Reynaud ,  Oleg Kononchuk ,  Christophe Maleville

IPC分类号： H01L21/30

CPC分类号： H01L21/324 ,  C30B29/06 ,  C30B33/00 ,  G01N21/9501

摘要： This invention provides methods for predictively revealing, in bulk silicon substrates, latent crystalline defects in bulk silicon substrates that become apparent only after subsequent processing, e.g., after processing during which multiple layers are split and lifted from the bulk substrates. Preferred predictive methods include a revealing heat treatment of bulk substrates conducted in a non-reducing atmosphere at a temperature in the range from approximately 500° C. to 1300° C. If desired, a further revealing heat treatment or defect enlargement step can be performed to enlarge defects revealed by the first revealing heat treatment.

摘要翻译： 本发明提供了在体硅衬底中预测性地揭示体硅衬底中潜在晶体缺陷的方法，其仅在后续处理之后变得显而易见，例如在多层被分离并从大块衬底提起之后。 优选的预测方法包括在大约500℃至1300℃的温度范围内在非还原气氛中进行的散装衬底的显露热处理。如果需要，可以进一步显露热处理或缺陷扩大步骤 以扩大第一次显露热处理所揭示的缺陷。

公开(公告)号：US07947571B2

公开(公告)日：2011-05-24

申请号：US12478063

申请日：2009-06-04

申请人： Luciana Capello ,  Oleg Kononchuk ,  Eric Neyret ,  Alexandra Abbadie ,  Walter Schwarzenbach

发明人： Luciana Capello ,  Oleg Kononchuk ,  Eric Neyret ,  Alexandra Abbadie ,  Walter Schwarzenbach

IPC分类号： H01L21/762

CPC分类号： H01L21/76254

摘要： The invention relates to a method for fabricating a semiconductor on insulator substrate, in particular a silicon on insulator substrate by providing a source substrate, providing a predetermined splitting area inside the source substrate by implanting atomic species, bonding the source substrate to a handle substrate, detaching a remainder of the source substrate from the source-handle component at the predetermined splitting area to thereby transfer a device layer of the source substrate onto the handle substrate, and thinning of the device layer. To obtain semiconductor on insulator substrates with a reduced Secco defect density of less than 100 per cm2 the implanting is carried out with a dose of less than 2.3×106 atoms per cm2 and the thinning is an oxidation step conducted at a temperature of less than 925° C.

摘要翻译： 本发明涉及一种通过提供源极衬底来制造绝缘体上半导体衬底，特别是绝缘体上硅衬底的方法，通过注入原子种类将源极衬底粘合到源极衬底内，将源极衬底接合到处理衬底上， 在预定的分割区域处将源极衬底的剩余部分从源极 - 手柄部件分离，从而将源极衬底的器件层转移到处理衬底上，并使器件层变薄。 为了获得具有小于每平方厘米100的Secco缺陷密度降低的半导体绝缘体衬底，以小于2.3×10 6原子/ cm 2的剂量进行注入，并且稀化是在小于925℃的温度下进行的氧化步骤 C。

公开(公告)号：US20110097871A1

公开(公告)日：2011-04-28

申请号：US12312017

申请日：2006-10-27

申请人： Eric Neyret ,  Oleg Kononchuk

发明人： Eric Neyret ,  Oleg Kononchuk

IPC分类号： H01L21/322 ,  H01L21/762

CPC分类号： H01L21/76254

摘要： Methods for forming semiconductor structures comprising a layer transferred from a donor substrate are provided in which the resulting structure has improved quality with respect of defects, and resulting structures therefrom. For example, a semiconductor on insulator (SeOI) structure can be formed by a method comprising: —providing a donor substrate (1) having a first density of vacancy clusters; —providing an insulating layer (3); —transferring a thin layer (10) from the donor substrate (1) to a support substrate (2) with the insulating layer (3) thereon; —curing the transferred thin layer (10) to reduce the first density of vacancy clusters to a second density; and being characterized in that the step of providing an insulating layer (30) comprises providing an oxygen barrier layer (4) to be in contact with the transferred thin layer (10), said oxygen barrier layer limiting diffusion of oxygen towards the thin layer during the curing.

摘要翻译： 提供了形成包括从供体基底转移的层的半导体结构的方法，其中所得到的结构相对于缺陷而提高了质量，并且由此产生了结构。 例如，可以通过以下方法形成绝缘体上半导体（SeOI）结构： - 提供具有第一密度空位簇的施主衬底（1） - 提供绝缘层（3）; - 将薄层（10）从施主衬底（1）转移到其上具有绝缘层（3）的支撑衬底（2）上; 固化转移的薄层（10）以将空位簇的第一密度降低至第二密度; 并且其特征在于，提供绝缘层（30）的步骤包括提供与转移的薄层（10）接触的氧阻挡层（4），所述氧阻隔层限制氧向薄层扩散 固化。

公开(公告)号：US20100052092A1

公开(公告)日：2010-03-04

申请号：US12478063

申请日：2009-06-04

申请人： Luciana Capello ,  Oleg Kononchuk ,  Eric Neyret ,  Alexandra Abbadie ,  Walter Schwarzenbach

发明人： Luciana Capello ,  Oleg Kononchuk ,  Eric Neyret ,  Alexandra Abbadie ,  Walter Schwarzenbach

IPC分类号： H01L21/762 ,  H01L27/12

CPC分类号： H01L21/76254

摘要： The invention relates to a method for fabricating a semiconductor on insulator substrate, in particular a silicon on insulator substrate by providing a source substrate, providing a predetermined splitting area inside the source substrate by implanting atomic species, bonding the source substrate to a handle substrate, detaching a remainder of the source substrate from the source-handle component at the predetermined splitting area to thereby transfer a device layer of the source substrate onto the handle substrate, and thinning of the device layer. To obtain semiconductor on insulator substrates with a reduced Secco defect density of less than 100 per cm2 the implanting is carried out with a dose of less than 2.3×106 atoms per cm2 and the thinning is an oxidation step conducted at a temperature of less than 925° C.

摘要翻译： 本发明涉及一种通过提供源极衬底来制造绝缘体上半导体衬底，特别是绝缘体上硅衬底的方法，通过注入原子种类将源极衬底粘合到源极衬底内，将源极衬底接合到处理衬底上， 在预定的分割区域处将源极衬底的剩余部分从源极 - 手柄部件分离，从而将源极衬底的器件层转移到处理衬底上，并使器件层变薄。 为了获得具有小于每平方厘米100的Secco缺陷密度降低的半导体绝缘体衬底，以小于2.3×10 6原子/ cm 2的剂量进行注入，并且稀化是在小于925℃的温度下进行的氧化步骤 C。

公开(公告)号：US20140027714A1

公开(公告)日：2014-01-30

申请号：US14004541

申请日：2012-04-04

申请人： Daniel Delprat ,  Christophe Figuet ,  Oleg Kononchuk

发明人： Daniel Delprat ,  Christophe Figuet ,  Oleg Kononchuk

IPC分类号： H01L35/02 ,  H01L35/34

CPC分类号： H01L35/02 ,  H01L35/22 ,  H01L35/26 ,  H01L35/34

摘要： A quantum well thermoelectric component for use in a thermoelectric device based on the thermoelectric effect, comprising a stack of layers of two materials respectively made on the basis of silicon and silicon-germanium, the first of the two materials, made on the basis of silicon, defining a barrier semiconductor material and the second of the two materials, made on the basis of silicon-germanium, defining a conducting semiconductor material, the barrier semiconductor material having a band gap higher than the band gap of the conducting semiconductor material, wherein the conducting semiconductor material is an alloy comprising silicon, germanium and at least a lattice-matching element, the lattice-matching element(s) being present in order to control a lattice parameter mismatch between the barrier layer made of the barrier semiconductor material and the conducting layer made of the conducting semiconductor material.

摘要翻译： 一种用于基于热电效应的热电装置的量子阱热电组件，包括分别基于硅和硅 - 锗制成的两种材料的一叠层，基于硅制成的两种材料中的第一种 限定导电半导体材料的基于硅 - 锗制成的阻挡半导体材料和所述两种材料中的第二材料，所述阻挡半导体材料的带隙高于导电半导体材料的带隙，其中， 导电半导体材料是包含硅，锗和至少晶格匹配元件的合金，存在晶格匹配元件，以便控制由阻挡半导体材料制成的势垒层与导体之间的晶格参数失配 由导电半导体材料制成的层。

公开(公告)号：US20070231932A1

公开(公告)日：2007-10-04

申请号：US11481691

申请日：2006-07-05

申请人： Patrick Reynaud ,  Oleg Kononchuk ,  Christophe Maleville

发明人： Patrick Reynaud ,  Oleg Kononchuk ,  Christophe Maleville

IPC分类号： H01L21/66

CPC分类号： H01L21/324 ,  C30B29/06 ,  C30B33/00 ,  G01N21/9501

摘要： This invention provides methods for predictively revealing, in bulk silicon substrates, latent crystalline defects in bulk silicon substrates that become apparent only after subsequent processing, e.g., after processing during which multiple layers are split and lifted from the bulk substrates. Preferred predictive methods include a revealing heat treatment of bulk substrates conducted in a non-reducing atmosphere at a temperature in the range from approximately 500° C. to 1300° C. If desired, a further revealing heat treatment or defect enlargement step can be performed to enlarge defects revealed by the first revealing heat treatment.

摘要翻译： 本发明提供了在体硅衬底中预测性地揭示体硅衬底中潜在晶体缺陷的方法，其仅在后续处理之后变得显而易见，例如在多层被分离并从大块衬底提起之后。 优选的预测方法包括在大约500℃至1300℃的温度范围内在非还原气氛中进行的散装衬底的显露热处理。如果需要，可以进一步显露热处理或缺陷扩大步骤 以扩大第一次显露热处理所揭示的缺陷。