Generic reallocation function for heap reconstitution in a multi-processor shared memory environment
    1.
    发明申请
    Generic reallocation function for heap reconstitution in a multi-processor shared memory environment 有权
    在多处理器共享内存环境中进行堆重构的通用重新分配功能

    公开(公告)号:US20050132162A1

    公开(公告)日:2005-06-16

    申请号:US11049817

    申请日:2005-02-03

    IPC分类号: G06F9/50 G06F12/00

    CPC分类号: G06F9/5016

    摘要: Managing memory includes receiving a request for a memory allocation, determining whether the memory allocation is to be maintained when subsequently initializing memory and saving information about the memory allocation to maintain the memory allocation during subsequently initializing memory. Initializing may be performed as part of special reset mode processing. Special reset mode processing may be performed in response to receiving a reset command. The memory may be shared by a plurality of processing units and the reset command may be issued to reset a first processing unit causing reset of the memory and a second processing unit may use a first allocated memory portion that is maintained when initializing the memory as part of processing for the reset command. Saving may include adding an entry to an allocation list associated with the memory, the entry including a location associated with the memory allocation.

    摘要翻译: 管理存储器包括接收对存储器分配的请求,确定随后初始化存储器时是否维持存储器分配并且保存关于存储器分配的信息以在随后的初始化存储器期间维持存储器分配。 可以作为特殊复位模式处理的一部分来执行初始化。 可以响应于接收到复位命令而执行特殊复位模式处理。 存储器可以由多个处理单元共享,并且可以发出复位命令以复位导致存储器复位的第一处理单元,并且第二处理单元可以使用在将存储器初始化时保持的第一分配存储器部分作为部分 的复位命令的处理。 保存可以包括向与存储器相关联的分配列表添加条目,该条目包括与该存储器分配相关联的位置。

    Pizza scheduler
    2.
    发明授权
    Pizza scheduler 有权
    披萨调度程序

    公开(公告)号:US09547528B1

    公开(公告)日:2017-01-17

    申请号:US12798036

    申请日:2010-03-29

    申请人: Steven McClure

    发明人: Steven McClure

    IPC分类号: G06F9/46 G06F9/48

    CPC分类号: G06F9/4881

    摘要: Causing a processor to execute a plurality of tasks includes determining a count for each task to be executed, determining a total count representing a sum of all counts for all tasks to be included in a run list, and constructing the run list by distributing corresponding entries for each task within the run list a number of times in accordance with each task's weighting factor. The weighting factor corresponds to a ratio of the each task's count with respect to a total count. Causing a processor to execute a plurality of tasks may also include executing the tasks in the run list in a round-robin manner where a particular entry in the run list is skipped in response to a corresponding task having previously relinquished a slot prior to expiration of time allotted for the task to run in the slot.

    摘要翻译: 使处理器执行多个任务包括确定要执行的每个任务的计数,确定表示要包括在运行列表中的所有任务的所有计数的总和的总计数,以及通过分配相应条目来构建运行列表 对于运行列表中的每个任务,根据每个任务的加权因子多次。 加权因子对应于每个任务计数相对于总计数的比率。 使处理器执行多个任务还可以包括以循环方式执行运行列表中的任务,其中响应于先前已经放弃了时隙的相应任务在跳过运行列表中的特定条目之前被跳过 时间分配给任务在时隙中运行。

    Fast verification of data block cycle redundancy checks
    4.
    发明授权
    Fast verification of data block cycle redundancy checks 有权
    快速验证数据块循环冗余校验

    公开(公告)号:US08307271B1

    公开(公告)日:2012-11-06

    申请号:US12586097

    申请日:2009-09-17

    IPC分类号: G06F11/10

    CPC分类号: G06F11/1004

    摘要: Detecting data errors in connection with a data transfer process includes performing an XOR operation on a plurality of data blocks to obtain a data block XOR result. An XOR operation may be performed on a plurality of cyclic redundancy check (CRC) codes associated with the plurality of data blocks to obtain a CRC XOR result. The data block XOR result and the CRC XOR result may be used to determine whether an error exists in the plurality of data blocks. The system may be used in connection with local IO transfers and in connection with local CPU XOR operations for a RAID system in which data may be mirrored, striped or otherwise distributed across multiple storage devices.

    摘要翻译: 检测与数据传送处理有关的数据错误包括对多个数据块执行异或运算以获得数据块XOR结果。 可以对与多个数据块相关联的多个循环冗余校验(CRC)码执行异或运算,以获得CRC异或结果。 可以使用数据块XOR结果和CRC XOR结果来确定多个数据块中是否存在错误。 该系统可以与本地IO传输结合使用,并且与RAID系统的本地CPU XOR操作相关联使用,其中数据可以被镜像,条带化或以其他方式分布在多个存储设备中。

    Techniques for global memory management and request processing
    7.
    发明授权
    Techniques for global memory management and request processing 有权
    全局内存管理和请求处理技术

    公开(公告)号:US08862832B1

    公开(公告)日:2014-10-14

    申请号:US12798034

    申请日:2010-03-29

    摘要: Described are techniques for processing a request to access global memory. For a first processor included on a first of a plurality of boards connected by a fabric, a logical address is determined for a global memory location in a system global memory. A first physical address for the logical address is determined. It is determined whether the first physical address is included in a first global partition of the first board. If so, first processing is performed including updating a memory map to map a window of the first processor's logical address space to a physical memory segment located within the first global partition. Otherwise, if the first physical address is included in a second of the plurality of global partitions physically located on one of the plurality of boards other than said first board, second processing is performed to issue the request over the fabric.

    摘要翻译: 描述了用于处理访问全局存储器的请求的技术。 对于包括在由结构连接的多个板中的第一个板上的第一处理器,为系统全局存储器中的全局存储器位置确定逻辑地址。 确定逻辑地址的第一个物理地址。 确定第一物理地址是否包括在第一板的第一全局分区中。 如果是,则执行第一处理,包括更新存储器映射以将第一处理器的逻辑地址空间的窗口映射到位于第一全局分区内的物理存储器段。 否则,如果第一物理地址被包括在物理上位于除了所述第一板之外的多个板中的一个上的多个全局分区中的第二个中,则执行第二处理以通过该结构发出请求。

    Techniques for use with memory partitioning and management
    8.
    发明授权
    Techniques for use with memory partitioning and management 有权
    用于内存分区和管理的技术

    公开(公告)号:US08375174B1

    公开(公告)日:2013-02-12

    申请号:US12798035

    申请日:2010-03-29

    IPC分类号: G06F12/00

    CPC分类号: G06F12/0284 G06F12/0692

    摘要: Described are techniques for partitioning memory. A plurality of boards is provided. Each of the plurality of boards includes a physical memory portion and a set of one or more processor. The physical memory portion in each of said plurality of boards is partitioned into a plurality of logical partitions including a global memory partition accessible by any processor on any of the plurality of boards and one or more other memory partitions configured for use by one or more processors of said each board. Each of the one or more other memory partitions not being accessible to a processor on a board other than said each board.

    摘要翻译: 描述了分区内存的技术。 提供多个板。 多个板中的每一个包括物理存储器部分和一组一个或多个处理器。 所述多个板中的每一个中的物理存储器部分被划分成多个逻辑分区,其包括由多个板中的任一个上的任何处理器可访问的全局存储器分区以及被配置为由一个或多个处理器使用的一个或多个其他存储器分区 的每个董事会。 一个或多个其他存储器分区中的每一个除了所述每个板之外的板上的处理器不可访问。