System and method to recover FPGA firmware over a sideband interface

    公开(公告)号:US11100228B2

    公开(公告)日:2021-08-24

    申请号:US16171168

    申请日:2018-10-25

    Abstract: Embodiments are described for recovery, via a sideband management bus, of firmware of a device such as an FPGA (Field Programmable Gate Array) card installed within an IHS (Information Handling System). A remote access controller of the IHS generates a security key for the device and transmits it to the device. The remote access controller requests the device to report the current version of the firmware in use by the device. The response from the device is authenticated based on the security key. If the current firmware version reported by the device is consistent with the master firmware version, the device is halted and the current firmware of the device is replaced with the master firmware. The device is initialized based on the master firmware used to update the device firmware.

    ADJUSTING A PROCESSING STATE OF AN INFORMATION HANDLING SYSTEM FROM MULTI-SOCKET MODE TO MULTI-SINGLE SOCKET MODE

    公开(公告)号:US20210081214A1

    公开(公告)日:2021-03-18

    申请号:US16572705

    申请日:2019-09-17

    Abstract: Methods, systems, and computer programs encoded on computer storage medium, for receiving a request to switch a mode of an information handling system (IHS) from a multi-socket mode to a multi-single socket mode; in response to receiving the request, placing each socket of the IHS in an auxiliary power state independent of each other; after placing each socket of the IHS in the auxiliary power state, altering parameters of the sockets of the IHS, including: altering CPU straps, power sequencing, reset sequencing, and bus re-direction associated with one or more of the sockets of the IHS; and in response to altering the parameters of the sockets of the IHS, switching the mode of the IHS from the multi-socket mode to the multi-single socket mode such that a processor for each socket is a bootstrap processor.

    System and method to proxy networking statistics for FPGA cards

    公开(公告)号:US10409940B1

    公开(公告)日:2019-09-10

    申请号:US16171849

    申请日:2018-10-26

    Abstract: Embodiments are described for supporting remote monitoring and management of FPGA (Field Programmable Gate Array) card operations. The FPGA card includes an external interface supporting core operations of the FPGA and for accessing functions defined by the programmable logic of the FPGA. Network activity data is collected from a network controller of the FPGA card. In response to invocation of an internal operations interface function by an external interface request, the collected network activity data is included in a network report for transmission to a remote access controller. A proxy message compliant with the external interface is used to transport the collected network activity data that is not supported by the external interface. The proxy message is transmitted to an FPGA management controller via the external interface, where it is converted to remote management protocol and transmitted to the remote management controller.

    SYSTEMS AND METHODS FOR MANAGEMENT CONTROLLER MANAGEMENT OF KEY ENCRYPTION KEY

    公开(公告)号:US20170201373A1

    公开(公告)日:2017-07-13

    申请号:US14992411

    申请日:2016-01-11

    Abstract: In accordance with embodiments of the present disclosure, a management controller configured to provide management-domain management of an information handling system may include a processor and a key management utility embodied in non-transitory computer-readable media. The key management utility may be configured to issue one or more commands to a cryptoprocessor for storing and sealing a key encryption key on the cryptoprocessor, wherein the key encryption key is for decrypting a media encryption key for encrypting and decrypting data stored to a storage resource of a host domain of the information handling system. The key management utility may also be configured to issue one or more commands to the cryptoprocessor for unsealing and retrieving the key encryption key from the cryptoprocessor.

    Adjusting a processing state of an information handling system from multi-socket mode to multi-single socket mode

    公开(公告)号:US11010173B2

    公开(公告)日:2021-05-18

    申请号:US16572705

    申请日:2019-09-17

    Abstract: Methods, systems, and computer programs encoded on computer storage medium, for receiving a request to switch a mode of an information handling system (IHS) from a multi-socket mode to a multi-single socket mode; in response to receiving the request, placing each socket of the IHS in an auxiliary power state independent of each other; after placing each socket of the IHS in the auxiliary power state, altering parameters of the sockets of the IHS, including: altering CPU straps, power sequencing, reset sequencing, and bus re-direction associated with one or more of the sockets of the IHS; and in response to altering the parameters of the sockets of the IHS, switching the mode of the IHS from the multi-socket mode to the multi-single socket mode such that a processor for each socket is a bootstrap processor.

    System and method to secure FPGA card debug ports

    公开(公告)号:US10852352B2

    公开(公告)日:2020-12-01

    申请号:US16171215

    申请日:2018-10-25

    Abstract: Embodiments are described for securing access to a debug port of an FPGA (Field Programmable Gate Array) card installed within an IHS (Information Handling System). A remote access controller determines the status of the FPGA card debug port via a query to a management controller of the FPGA card. The remote access controller generates a passcode for the debug port and disables the debug port via a message to the management controller. The management controller detects a request, that includes a requestor password, for access to the debug port. The remote access controller authorizes the requestor's access to the debug port if the requestor password matches the generated passcode. The remote access controller disables the debug port upon each power cycle of the FPGA card or upon detecting removal of a device from the debug port.

    Systems and methods for dynamic root of trust measurement in management controller domain

    公开(公告)号:US10146952B2

    公开(公告)日:2018-12-04

    申请号:US15226280

    申请日:2016-08-02

    Abstract: A method may include, by a program of instructions embodied in a read-only memory of a management controller communicatively coupled to a host system processor of an information handling system and configured to provide management of the information handling system via management traffic communicated between the management controller and a dedicated management network external to the information handling system, performing authenticity checks for each of a plurality of sequentially loaded software components of the management controller and controlling execution of the plurality of software components and access by the software components to one or more information handling resources of the information handling system based on the authenticity checks and a configurable policy associated with the management controller, wherein such control of execution and access permits execution of and access by those software components passing the authenticity checks in the event of failure by at least one of the software components.

    Systems and methods for enabling a systems management interface with an alternate frame buffer

    公开(公告)号:US10115375B2

    公开(公告)日:2018-10-30

    申请号:US14943343

    申请日:2015-11-17

    Abstract: A method may include in response to determining a host system is off, configuring a video controller of an information handling system including setting a display resolution of the video controller and writing management video data associated to a primary frame buffer such that management video data is able to be retrieved by the video controller for output to one or both of a first display associated with the host system and a second display of a management interface communicatively coupled to a management controller communicatively coupled to the processor and the memory and configured to provide out-of-band management of the information handling system. The method may further include in response to determining the host system is on, writing the management video data to an alternate frame buffer such that management video data is able to be retrieved by the video controller for output to the second display.

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