Heat dissipation features, electronic devices incorporating heat dissipation features, and methods of making heat dissipation features
    1.
    发明授权
    Heat dissipation features, electronic devices incorporating heat dissipation features, and methods of making heat dissipation features 有权
    散热功能,散热特性的电子设备,以及散热功能的方法

    公开(公告)号:US09165854B2

    公开(公告)日:2015-10-20

    申请号:US13445385

    申请日:2012-04-12

    摘要: Electronic devices incorporating a heat dissipation feature include an enclosure, and at least one heat-generating component positioned within the enclosure. The heat dissipation feature is sufficiently coupled to the at least one heat-generating component to facilitate conductive heat transfer from the heat-generating component. The heat dissipation feature includes a plurality of protrusions exposed externally to the enclosure. A thermally insulating material may be disposed on at least a tip portion of at least some of the protrusions. The thermally insulating material is selected to provide a touch temperature that is below a predetermined threshold. In some instances, the thermally insulating material can provide such a touch temperature by selecting the material to include properties for thermal conductivity (k), density (ρ), and specific heat (Cp) such that the product of k*ρ*Cp results in a value less than a product of k*ρ*Cp for human skin.

    摘要翻译: 结合散热特征的电子设备包括外壳,以及至少一个定位在外壳内的发热元件。 散热特征与至少一个发热部件充分耦合,以便于来自发热部件的传导热传递。 散热特征包括暴露在外壳外部的多个突起。 绝热材料可以设置在至少一些突起的至少一个尖端部分上。 选择绝热材料以提供低于预定阈值的触摸温度。 在一些情况下,绝热材料可以通过选择材料来提供这样的触摸温度,以包括热导率(k),密度(&rgr)和比热(Cp)的性质,使得k *&rgr; * Cp导致小于人类皮肤的k *&rgr; * Cp的乘积的值。

    HEAT DISSIPATION FEATURES, ELECTRONIC DEVICES INCORPORATING HEAT DISSIPATION FEATURES, AND METHODS OF MAKING HEAT DISSIPATION FEATURES
    2.
    发明申请
    HEAT DISSIPATION FEATURES, ELECTRONIC DEVICES INCORPORATING HEAT DISSIPATION FEATURES, AND METHODS OF MAKING HEAT DISSIPATION FEATURES 有权
    散热功能,加热散热功能的电子设备及制热散热功能的方法

    公开(公告)号:US20130271920A1

    公开(公告)日:2013-10-17

    申请号:US13445385

    申请日:2012-04-12

    IPC分类号: H05K7/20 B23P19/04 F28F7/00

    摘要: Electronic devices incorporating a heat dissipation feature include an enclosure, and at least one heat-generating component positioned within the enclosure. The heat dissipation feature is sufficiently coupled to the at least one heat-generating component to facilitate conductive heat transfer from the heat-generating component. The heat dissipation feature includes a plurality of protrusions exposed externally to the enclosure. A thermally insulating material may be disposed on at least a tip portion of at least some of the protrusions. The thermally insulating material is selected to provide a touch temperature that is below a predetermined threshold. In some instances, the thermally insulating material can provide such a touch temperature by selecting the material to include properties for thermal conductivity (k), density (ρ), and specific heat (Cp) such that the product of k*ρ*Cp results in a value less than a product of k*ρ*Cp for human skin.

    摘要翻译: 结合散热特征的电子设备包括外壳,以及至少一个定位在外壳内的发热元件。 散热特征与至少一个发热部件充分耦合,以便于来自发热部件的传导热传递。 散热特征包括暴露在外壳外部的多个突起。 绝热材料可以设置在至少一些突起的至少一个尖端部分上。 选择绝热材料以提供低于预定阈值的触摸温度。 在某些情况下,绝热材料可以通过选择材料来提供这样的触摸温度,以包括热导率(k),密度(rho)和比热(Cp)的性质,使得k * rho * Cp的结果结果 其值小于人皮肤的k * rho * Cp的乘积。

    Multiple stream variable length encoder and decoder
    3.
    发明授权
    Multiple stream variable length encoder and decoder 失效
    多流可变长度编码器和解码器

    公开(公告)号:US06498571B2

    公开(公告)日:2002-12-24

    申请号:US09734236

    申请日:2000-12-08

    申请人: Stephen A. Molloy

    发明人: Stephen A. Molloy

    IPC分类号: H03M740

    摘要: An apparatus may include a first plurality of registers, each register in the first plurality of registers configured to store data wordss, a first selector coupled to the first plurality of registers, the first selector configured to receive a data words stored in each register in the first plurality of registers, and configured to output the data words from a selected register from the first plurality of registers in response to a selection signal, a second plurality of registers, each register in the second plurality of registers configured to store a pointer associated with each register in the first plurality of registers, a second selector coupled to the second plurality of registers, the selector circuit configured to receive data from each register in the second plurality of registers, and configured to output data from a selected register from the second plurality of registers in response to the selection signal, the data comprising a pointer associated with the selected register from the first plurality of registers, a shift register coupled to the first selector and to the second selector circuit, the shift register configured to receive the data words from the selected register in the first plurality of registers, configured to receive the pointer, and configured to output a portion of the data words, the portion of the data words determined by the pointer, and a decoder coupled to the shift register, the decoder configured to receive the portion of the data words, and configured to output decoded data in response to the portion of the data words.

    摘要翻译: 装置可以包括第一多个寄存器,第一多个寄存器中的每个寄存器被配置为存储数据字,第一选择器耦合到第一多个寄存器,第一选择器被配置为接收存储在第一多个寄存器中的每个寄存器中的数据字。 第一多个寄存器,并且被配置为响应于选择信号从第一多个寄存器中选择的寄存器输出数据字,第二多个寄存器,第二多个寄存器中的每个寄存器被配置为存储与 所述第一多个寄存器中的每个寄存器,耦合到所述第二多个寄存器的第二选择器,所述选择器电路被配置为从所述第二多个寄存器中的每个寄存器接收数据,并且被配置为从所述第二多个寄存器中的所选寄存器输出数据 响应于选择信号的寄存器,数据包括与所选择的寄存器相关联的指针 耦合到所述第一选择器和所述第二选择器电路的移位寄存器,所述移位寄存器被配置为从被配置为接收所述指针的所述第一多个寄存器中的所选择的寄存器接收数据字;以及 被配置为输出所述数据字的一部分,由所述指针确定的所述数据字的部分以及耦合到所述移位寄存器的解码器,所述解码器被配置为接收所述数据字的所述部分,并且被配置为响应于输出解码数据 到数据字的一部分。

    Computer program product for transforming streaming video data
    4.
    发明授权
    Computer program product for transforming streaming video data 有权
    用于转换流视频数据的计算机程序产品

    公开(公告)号:US07114174B1

    公开(公告)日:2006-09-26

    申请号:US09502390

    申请日:2000-02-10

    IPC分类号: H04N7/173

    摘要: According to one embodiment, a computer program product for a system including a processor includes a tangible memory including code that directs the processor to determine an output resolution for an output stream of data, code that directs the processor to determine an output frame rate for the output stream of data, code that directs the processor to determine an output color depth for the output stream of data, code that directs the processor to retrieve a first frame of data, a second frame of data, and a third frame of data from an input stream of data, the input stream of data having an input resolution, an input frame rate, and an input color depth, code that directs the processor to subsample the first frame of data, the second frame of data, and the third frame of data to respectively form a first subsampled frame of data, a second subsampled frame of data, and a third subsampled frame of data, when the output resolution is lower than the input resolution are also included, code that directs the processor to remove the second subsampled frame of data, when the output frame rate is lower than the input frame rate, code that directs the processor to reduce color depth for the first subsampled frame of data and the second subsampled frame of data to respectively form a first reduced frame of data and a second reduced frame of data, when the output color depth is smaller than the input color depth, and code that directs the processor to convert the first reduced frame of data and the second reduced frame of data into the output stream of data.

    摘要翻译: 根据一个实施例,一种用于包括处理器的系统的计算机程序产品包括有形存储器,其包括指示处理器确定输出数据流的输出分辨率的代码,指示处理器确定输出帧速率的代码 输出数据流,指示处理器确定输出数据流的输出颜色深度的代码,指示处理器检索第一数据帧的代码,第二数据帧和来自第一数据帧的第三帧数据 输入数据流,具有输入分辨率的输入数据流,输入帧速率和输入颜色深度,指示处理器对第一数据帧进行二次采样的代码,第二数据帧和第三帧 还包括当输出分辨率低于输入分辨率时,数据分别形成数据的第一子采样帧,第二子采样帧数据和第三子采样帧数据,c 当输出帧速率低于输入帧速率时,引导处理器去除第二子采样帧数据的代码,指示处理器减少第一子采样帧数据和第二子采样帧数据的颜色深度的代码 当输出颜色深度小于输入颜色深度时,分别形成数据的第一缩小帧和第二缩小帧数据;以及代码,其指示处理器转换第一缩减帧数据和第二缩小帧数据 数据输入数据流。

    Processor architecture for compression and decompression of video and images
    5.
    发明授权
    Processor architecture for compression and decompression of video and images 失效
    用于压缩和解压缩视频和图像的处理器架构

    公开(公告)号:US06909744B2

    公开(公告)日:2005-06-21

    申请号:US09733612

    申请日:2000-12-08

    申请人: Stephen A. Molloy

    发明人: Stephen A. Molloy

    CPC分类号: G06T9/008 H04N19/42 H04N19/61

    摘要: A video encoder/decoder includes a vector pipeline unit and is configured only once by a processor to encode/decode data in accordance with any one of the JPEG, MPEG1, MPEG2 or MPEG4, H.261 or H.263 compression standards. The configuration data is stored in a configuration register of the video encoder/decoder. An optional ROM stores the configuration data for subsequent reading and loading—by the processor—into the configuration register. The vector pipeline unit includes: a run-length decoder, a binary arithmetic logic unit, a binary multiplier/divider, an accumulator, a barrel shifter, a round/modify unit, a saturate logic unit, a status register and a run-length encoder. Each component of the vector pipeline unit is optionally enabled or disabled. By disabling one or more components of the vector pipeline unit the power consumed by the encoder/decoder is reduced. The vector pipeline, after being configured continuously encodes/decodes vectors of data according to the configured standard, without requiring any additional configuration or software programming. The status register gathers statistical data on the saturated data and supplies the statistical data to the processor, thereby, further improving the performance of the video encode/decoder. The video encoder/decoder encodes/decodes data based on any other compression standard with additional configuration or software programming.

    摘要翻译: 视频编码器/解码器包括矢量流水线单元,并且仅由处理器配置一次以根据JPEG,MPEG1,MPEG2或MPEG4,H.261或H.263压缩标准中的任何一个对数据进行编码/解码。 配置数据存储在视频编码器/解码器的配置寄存器中。 一个可选的ROM存储用于后续读取和由处理器加载的配置数据到配置寄存器中。 矢量流水线单元包括:游程长度解码器,二进制算术逻辑单元,二进制乘法器/除法器,累加器,桶形移位器,循环/修改单元,饱和逻辑单元,状态寄存器和游程长度 编码器。 可选地,启用或禁用向量流水线单元的每个组件。 通过禁用向量流水线单元的一个或多个组件,减少编码器/解码器消耗的功率。 配置后,向量管道将根据配置的连续编码/解码数据向量,无需任何其他配置或软件编程。 状态寄存器收集关于饱和数据的统计数据,并将统计数据提供给处理器,从而进一步提高视频编码/解码器的性能。 视频编码器/解码器根据任何其他压缩标准对附加配置或软件编程的数据进行编码/解码。

    Intelligent decoded picture buffering
    6.
    发明授权
    Intelligent decoded picture buffering 有权
    智能解码图片缓冲

    公开(公告)号:US09253496B2

    公开(公告)日:2016-02-02

    申请号:US12333781

    申请日:2008-12-12

    摘要: A system and method for intelligent decoded picture buffering is described. In one embodiment, a video bitstream buffer receives and temporarily holds an encoded compressed bitstream containing portions of a video. Then, a look ahead parser scans ahead in the video to analyze portions of the encoded video bitstream in the video bitstream buffer to predict the value of the video. Based on this prediction, an intelligent memory manager prioritizes the video portions, and then sends the high valued video portions to a first buffer and sends the low valued video portions to a second buffer.

    摘要翻译: 描述了用于智能解码图像缓冲的系统和方法。 在一个实施例中,视频比特流缓冲器接收并临时保存包含视频部分的编码压缩比特流。 然后,前视解析器在视频中向前扫描以分析视频比特流缓冲器中的编码视频比特流的部分,以预测视频的值。 基于该预测,智能存储器管理器对视频部分进行优先级排序,然后将高值视频部分发送到第一缓冲器,并将低值视频部分发送到第二缓冲器。

    Methods for transforming streaming video data
    7.
    发明授权
    Methods for transforming streaming video data 失效
    转换流视频数据的方法

    公开(公告)号:US07339993B1

    公开(公告)日:2008-03-04

    申请号:US09502549

    申请日:2000-02-10

    IPC分类号: H04N7/12 H04N11/02

    摘要: A method for forming an output stream of data includes determining an output resolution for the output stream of data, determining an output frame rate for the output stream of data, determining an output color depth for the output stream of data, retrieving a first frame of data, a second frame of data, and a third frame of data from an input stream of data, the input stream of data having an input resolution, an input frame rate, and an input color depth, subsampling the first frame of data, the second frame of data, and the third frame of data to respectively form a first subsampled frame of data, a second subsampled frame of data, and a third subsampled frame of data, when the output resolution is lower than the input resolution, dropping the second subsampled frame of data, when the output frame rate is lower than the input frame rate, reducing color depth for the first subsampled frame of data and the second subsampled frame of data to respectively form a first reduced frame of data and a second reduced frame of data, when the output color depth is smaller than the input color depth, and converting the first reduced frame of data and the second reduced frame of data into the output stream of data.

    摘要翻译: 用于形成输出数据流的方法包括确定数据的输出流的输出分辨率,确定输出数据流的输出帧速率,确定输出数据流的输出颜色深度,检索数据的第一帧 数据,第二帧数据和来自输入数据流的第三帧数据,所述输入数据流具有输入分辨率,输入帧速率和输入颜色深度,对第一数据帧进行二次采样, 第二帧数据和第三帧数据分别形成数据的第一子采样帧,第二子采样帧数据和第三子采样帧数据,当输出分辨率低于输入分辨率时,丢弃第二帧数据 子采样数据帧,当输出帧速率低于输入帧速率时,减少第一子采样帧数据的色深和第二子采样帧数据,分别形成d的第一缩减帧 并且当输出颜色深度小于输入颜色深度时,将数据的第一缩小帧和第二缩小的数据帧转换成输出数据流。

    System for transforming streaming video data
    10.
    发明授权
    System for transforming streaming video data 有权
    用于转换流视频数据的系统

    公开(公告)号:US07143432B1

    公开(公告)日:2006-11-28

    申请号:US09502409

    申请日:2000-02-10

    IPC分类号: H04N7/173

    摘要: According to one embodiment, a circuit configured to form an output video stream includes a resolution modification circuit configured to receive a plurality of video frames from a frame buffer, and configured to modify resolution of the plurality of video frames, when the desired resolution for the output video stream is different than a resolution of the input video stream, the plurality of frames of data derived from an input video stream, a frame reducing circuit coupled to the resolution reducing circuit configured to reduce a number of video frames in the plurality of video frames from the resolution reducing circuit, when a desired frame rate for the output video stream is different than a frame rate of the input video stream, a depth reduction circuit coupled to the frame reducing circuit configured to reduce bit depth of the plurality of video frames from the frame reducing circuit, when a desired bit depth for the output video stream is different than a bit depth of the input video stream, and a rate reduction circuit coupled to the depth reduction circuit, configured to scale the plurality of video frames from the depth reduction circuit, in response to a desired bit rate for the output video stream, and an encoder coupled to the rate reduction circuit, configured to encode the plurality of video frames from the rate reduction circuit into the output video stream is also contemplated.

    摘要翻译: 根据一个实施例,配置成形成输出视频流的电路包括分辨率修改电路,其被配置为从帧缓冲器接收多个视频帧,并且被配置为当所述多个视频帧的期望分辨率为 输出视频流不同于输入视频流的分辨率,从输入视频流导出的多个数据帧,耦合到分辨率降低电路的帧降低电路,被配置为减少多个视频中的视频帧的数量 当所述输出视频流的期望帧速率与所述输入视频流的帧速率不同时,来自所述分辨率降低电路的帧的深度降低电路被配置为减少所述多个视频帧的比特深度 当输出视频流的期望比特深度不同于输入的比特深度时,来自帧缩减电路 视频流和耦合到深度降低电路的速率降低电路,被配置为响应于输出视频流的期望比特率而从深度降低电路缩放多个视频帧,以及耦合到速率降低的编码器 被配置为将多个视频帧从速率降低电路编码成输出视频流的电路也是可能的。