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公开(公告)号：US06680939B1
公开(公告)日：2004-01-20
申请号：US09661844
申请日：2000-09-14
IPC分类号： H04L1250
CPC分类号： H04L45/00 , H04L45/583 , H04L49/45
摘要： A routing switch includes a first router module having N1 signal input terminals, M1 signal output terminals, an expansion input terminal and an expansion output terminal and including a core for routing a signal received at any one of the N1 signal input terminals selectively to any one or more of the output terminals and for routing a signal received at the expansion input terminal selectively to any one or more of the N1 signal output terminals. The router further includes a second router module having N2 signal input terminals, M2 signal output terminals, an expansion input terminal and an expansion output terminal and including a core for routing a signal received at any one of the N2 signal input terminals selectively to any one or more of the output terminals and for routing a signal received at the expansion input terminal selectively to any one or more of the M2 signal output terminals. The expansion output terminal of the first router module is connected to the expansion input terminal of the second router module and the expansion output terminal of the second router module is connected to the expansion input terminal of the first router module.
摘要翻译： 路由交换机包括具有N1个信号输入端子，M1信号输出端子，扩展输入端子和扩展输出端子的第一路由器模块，并且包括用于将在N1个信号输入端子中的任何一个接收的信号选择性地选择性地对任一个 或更多的输出端子，并用于将在扩展输入端子处接收到的信号选择性地选择性地路由到N1信号输出端子中的任何一个或多个。 路由器还包括具有N2信号输入端子，M2信号输出端子，扩展输入端子和扩展输出端子的第二路由器模块，并且包括用于将在任一个N2信号输入端子接收的信号选择性地选择性地路由到任何一个 或更多的输出端子，并且用于将在扩展输入端子处接收的信号有选择地选择性地传送到任何一个或多个M2信号输出端子。 第一路由器模块的扩展输出端连接到第二路由器模块的扩展输入端，第二路由器模块的扩展输出端连接到第一路由器模块的扩展输入端。
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公开(公告)号：US08359417B2
公开(公告)日：2013-01-22
申请号：US12986113
申请日：2011-01-06
CPC分类号： G06F3/00 , G06F13/12 , G06F13/4022 , H04N21/23602 , H04N21/2368
摘要： A composite input signal having an audio component and a video component is routed from an input to an output by separating a stream of audio data words at an average frequency F1 from the video component and supplying the separated stream of audio data words sequentially to a FIFO input register. The output of the FIFO input register is polled at a frequency F2, greater than F1, and, in the event that an audio data word is available at the output of the FIFO input register, the audio data word is conveyed from the output of the FIFO input register to an input of a signal path. Otherwise a null data word is conveyed to the input of the signal path. The signal path thereby conveys a stream of data words that comprises both audio data words and null data words. The audio data words of the stream conveyed by the path are combined with the video component of the composite input signal.
摘要翻译： 将具有音频分量和视频分量的复合输入信号从输入路由到输出，通过从视频分量分离平均频率F1的音频数据字流，并将音频数据字的分离流顺序提供给FIFO 输入寄存器。 FIFO输入寄存器的输出以大于F1的频率F2进行轮询，并且在FIFO输入寄存器的输出处音频数据字可用的情况下，音频数据字从 FIFO输入寄存器到信号路径的输入。 否则，空信息字被传送到信号路径的输入端。 因此，信号路径传达包括音频数据字和空数据字的数据字流。 由路径传送的流的音频数据字与复合输入信号的视频分量组合。
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公开(公告)号：US20120017014A1
公开(公告)日：2012-01-19
申请号：US12986113
申请日：2011-01-06
IPC分类号： G06F13/12
CPC分类号： G06F3/00 , G06F13/12 , G06F13/4022 , H04N21/23602 , H04N21/2368
摘要： A composite input signal having an audio component and a video component is routed from an input to an output by separating a stream of audio data words at an average frequency F1 from the video component and supplying the separated stream of audio data words sequentially to a FIFO input register. The output of the FIFO input register is polled at a frequency F2, greater than F1, and, in the event that an audio data word is available at the output of the FIFO input register, the audio data word is conveyed from the output of the FIFO input register to an input of a signal path. Otherwise a null data word is conveyed to the input of the signal path. The signal path thereby conveys a stream of data words that comprises both audio data words and null data words. The audio data words of the stream conveyed by the path are combined with the video component of the composite input signal.
摘要翻译： 将具有音频分量和视频分量的复合输入信号从输入路由到输出，通过从视频分量分离平均频率F1的音频数据字流，并将音频数据字的分离流顺序提供给FIFO 输入寄存器。 FIFO输入寄存器的输出以大于F1的频率F2进行轮询，并且在FIFO输入寄存器的输出处音频数据字可用的情况下，音频数据字从 FIFO输入寄存器到信号路径的输入。 否则，空信息字被传送到信号路径的输入端。 因此，信号路径传达包括音频数据字和空数据字的数据字流。 由路径传送的流的音频数据字与复合输入信号的视频分量组合。
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4.发明授权Method and apparatus for embedding digital audio data in a serial digital video data stream 失效用于将数字音频数据嵌入串行数字视频数据流中的方法和装置公开(公告)号：US06690428B1
公开(公告)日：2004-02-10
申请号：US09394747
申请日：1999-09-13
IPC分类号： H04N708
CPC分类号： H04N21/4342 , H04N21/23602 , H04N21/2368 , H04N21/4341
摘要： Audio data of at least two audio data groups is embedded in an ancillary data space of a serial digital video data stream by multiplexing the audio data groups to provide a serial multi-group audio data stream, and inserting the serial multi-group audio data stream into the ancillary data space of the serial digital video data stream.
摘要翻译： 至少两个音频数据组的音频数据被嵌入在串行数字视频数据流的辅助数据空间中，通过多路复用音频数据组以提供串行多组音频数据流，以及插入串行多组音频数据流 进入串行数字视频数据流的辅助数据空间。
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5.发明授权Phase comparator for biphase coded signal including preamble with code violation 失效双相编码信号的相位比较器，包括具有代码违规的前导码
公开(公告)号：US5459765A
公开(公告)日：1995-10-17
申请号：US3534
申请日：1993-01-12
申请人： Charles S. Meyer , Donald S. Lydon
发明人： Charles S. Meyer , Donald S. Lydon
CPC分类号： H04L25/4904 , H03L7/089 , H03L7/191 , H03M5/12 , H04L7/0083 , H04L7/033 , H04L7/04
摘要： Phase of first and second signals is compared by producing an output signal in the event of a predetermined phase relationship between the first and second signals and clearing the output signal at a predetermined phase during the cycle of the second signal regardless of the state of the first signal.
摘要翻译： 第一和第二信号的相位通过在第一和第二信号之间的预定相位关系的情况下产生输出信号，并且在第二信号的周期期间以预定相位清零输出信号，而不管第一和第二信号的状态如何 信号。
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公开(公告)号：US06757302B1
公开(公告)日：2004-06-29
申请号：US09661845
申请日：2000-09-14
申请人： Donald S. Lydon , Charles S. Meyer
发明人： Donald S. Lydon , Charles S. Meyer
IPC分类号： H04J306
CPC分类号： G11B20/12 , G11B20/00992 , G11B20/10527
摘要： First and second successions of data words, each data word including multiple payload data bits, a data block bit (C) and a block character (SOB) having a first state to indicate start of a sequence of data block bits and otherwise having a second state, are processed by detecting as a first event occurrence of the block character of the first succession of data words in the first state and as a second event the next succeeding occurrence of the block character of the second succession of data words in the first state, wherein the second event is delayed by a time Tz relative to the first event, reading the data block bits from successive data words of the first succession and generating a succession of delayed data block bits of the first succession of data words, delayed by the time Tz relative to the payload data bits of the first succession of data words. The data block bits of the delayed succession of data block bits are inserted in successive words of the first succession of data words, so that the start of the sequence of data block bits in the first succession of data words coincides with the start of the sequence of data block bits in the second succession of data words.
摘要翻译： 第一和第二连续的数据字，每个数据字包括多个有效载荷数据位，数据块位（C）和块字符（SOB），具有第一状态，以指示数据块位序列的开始， 状态，通过检测作为第一状态的数据字的第一序列的块字符的第一事件发生，并且作为第二事件处理第一状态中的第二连续数据字的块字符的下一个后续发生 ，其中所述第二事件相对于所述第一事件延迟时间Tz，从所述第一序列的连续数据字读取所述数据块位，并且生成所述第一序列数据字的延迟数据块位的一系列， 时间Tz相对于第一连续数据字的有效载荷数据位。 数据块比特的延迟连续数据块比特的数据块比特被插入到第一连续数据字的连续字中，使得第一连续数据字中的数据块比特序列的开始与序列的开始一致 的第二连续数据字中的数据块位。
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公开(公告)号：US06658494B2
公开(公告)日：2003-12-02
申请号：US09839571
申请日：2001-04-20
IPC分类号： G06F1300
摘要： A router that utilizes one additional crosspoint module to provide backup to N crosspoint modules. The redundant crosspoint module receives every input from P input modules and provides O/N outputs to M output modules. Each of the M output modules receives an output from a particular N crosspoint module and a corresponding O/M output from the redundant crosspoint module. Each output module has logic to determine whether the output module should select the output from a particular N crosspoint module or the output of the redundant crosspoint module.
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公开(公告)号：US06381270B1
公开(公告)日：2002-04-30
申请号：US09227025
申请日：1999-01-07
申请人： Donald S. Lydon , Charles S. Meyer
发明人： Donald S. Lydon , Charles S. Meyer
IPC分类号： H03H730
CPC分类号： H04L25/03885
摘要： An electrical signal is equalized at the receiving end of a transmission path by applying the signal both to a frequency-dependent emphasizer and to a first port of a mixer and applying the output signal of the frequency-dependent emphasizer to a second port of the mixer. The mixer combines the signals received at its first and second ports in accordance with the amplitude of a mixer control signal to generate a mixer output signal. A control signal is generated from the mixer output signal. The control signal has an amplitude dependent on the absolute value of the derivative of the amplitude of the output signal of the mixer during an interval that starts after the beginning of a bit cell and ends before the end of the bit cell. The control signal is applied to the mixer as the mixer control signal.
摘要翻译： 通过将信号施加到频率依赖的增强器和混频器的第一端口，将电信号在传输路径的接收端处均衡，并将频率依赖的增强器的输出信号施加到混频器的第二端口 。 混频器根据混频器控制信号的幅度组合在其第一和第二端口接收的信号，以产生混频器输出信号。 从混频器输出信号产生控制信号。 控制信号的幅度取决于混频器的输出信号的幅度的导数的绝对值，该间隔在比特单元的开始之后开始并在比特单元结束之前结束的间隔内。 控制信号作为混频器控制信号施加到混频器。
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公开(公告)号：US06021144A
公开(公告)日：2000-02-01
申请号：US257273
申请日：1999-02-24
申请人： Charles S. Meyer , Jeffrey S. Evans
发明人： Charles S. Meyer , Jeffrey S. Evans
IPC分类号： H01S5/0683 , H01S3/00
CPC分类号： H01S5/0683
摘要： An automatic power control circuit for a laser driver which is responsive to a data signal for driving a laser diode includes a low pass filter connected to receive the data signal and generate an output signal dependent on the DC content of the data signal. A circuit responsive to both an externally provided average power control signal and the output signal of the low pass filter controls supply of operating current to the laser diode.
摘要翻译： 用于激光驱动器的自动功率控制电路，其响应于用于驱动激光二极管的数据信号，包括连接以接收数据信号并根据数据信号的DC内容生成输出信号的低通滤波器。 响应于外部提供的平均功率控制信号和低通滤波器的输出信号的电路控制向激光二极管的工作电流的供应。
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公开(公告)号：US06519069B1
公开(公告)日：2003-02-11
申请号：US09261009
申请日：1999-03-02
申请人： Jeffrey S. Evans , Charles S. Meyer
发明人： Jeffrey S. Evans , Charles S. Meyer
IPC分类号： H04B1006
CPC分类号： H04B10/6971
摘要： An optoelectric converter for generating a binary electrical data signal from a binary optical data signal includes a semiconductor photodetector for receiving the optical data signal and generating an electrical current signal. An amplifier receives the current signal generated by the semiconductor photodetector and providing a voltage output signal. An equalizer receives the voltage signal generated by the amplifier and generates an equalizer output voltage signal. A DC restorer receives the equalizer output voltage signal and generates a DC restored voltage signal.
摘要翻译： 用于从二进制光数据信号产生二进制电数据信号的光电转换器包括用于接收光数据信号并产生电流信号的半导体光电检测器。 放大器接收由半导体光电检测器产生的电流信号并提供电压输出信号。 均衡器接收由放大器产生的电压信号，并产生均衡器输出电压信号。 DC恢复器接收均衡器输出电压信号并产生DC恢复电压信号。
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