Transistor antifuse device
    2.
    发明授权
    Transistor antifuse device 失效
    晶体管反熔丝装置

    公开(公告)号:US07679426B2

    公开(公告)日:2010-03-16

    申请号:US11039157

    申请日:2005-01-19

    IPC分类号: H01H37/76 H01H85/00

    CPC分类号: G11C17/16

    摘要: In one embodiment, a method provides a bipolar junction transistor that is coupled to a first power supply. A second power supply is utilized to turn on the bipolar junction transistor. And, the bipolar junction transistor is overdriven.

    摘要翻译: 在一个实施例中,一种方法提供耦合到第一电源的双极结型晶体管。 利用第二电源来接通双极结型晶体管。 而且,双极结晶体管是过驱动的。

    Fuse structure
    7.
    发明授权
    Fuse structure 有权
    保险丝结构

    公开(公告)号:US07209027B2

    公开(公告)日:2007-04-24

    申请号:US11217908

    申请日:2005-08-31

    IPC分类号: H01H85/10

    摘要: A fuse structure is described. The fuse structure includes a first region adapted to be coupled to a voltage source, a second region adapted to be coupled to a ground, and a current flow region disposed between the first and second regions. The current flow region has a configuration that causes a void to be opened at a point of localized heating due to current crowding within the current flow region and that causes the void to propagate across the current flow region.

    摘要翻译: 描述了熔丝结构。 熔丝结构包括适于耦合到电压源的第一区域,适于耦合到地的第二区域以及设置在第一和第二区域之间的电流流动区域。 电流流动区域具有这样的结构,其导致在局部加热点处由于电流流动区域内的电流拥挤而导致空隙,并且导致空隙在电流流动区域上传播。

    Substrate etch method and device
    9.
    发明授权
    Substrate etch method and device 失效
    基板蚀刻方法和器件

    公开(公告)号:US06933237B2

    公开(公告)日:2005-08-23

    申请号:US10178033

    申请日:2002-06-21

    CPC分类号: H01L21/76898

    摘要: The present invention provides methods and an etched substrate. In one embodiment, a method for etching a substrate is provided which comprises creating an etch hole in the substrate using a through the substrate etch and forming a junction on an interior of the etched hole for forming a semiconductor device therein.

    摘要翻译: 本发明提供了方法和蚀刻的衬底。 在一个实施例中,提供了一种用于蚀刻衬底的方法,其包括通过衬底蚀刻在衬底中产生蚀刻孔,并在其上形成半导体器件的蚀刻孔内部形成结。